As a Design for Test Engineer at Apple, you will be responsible for designing and developing DFT architecture, verifying ATPG design rules, and performing ATPG for test time reduction and silicon diagnosis. You will also generate ATPG patterns, perform ATE bring-up and debug, and code Verilog RTL for DFT. Collaboration with designers on STA, physical, power, and logical issues is required. You will work with Test Engineering for ATE bring-up and the DV team to verify DFT implementations. This role requires international travel and involves working 40 hours per week, offering a comprehensive compensation package including base pay, stock options, and various benefits like medical and dental coverage.