Design Methodology Engineer

Job Posting Date

2025-09-18

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Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

Qualcomm’s Design Technology team is seeking a motivated engineer to drive development of advanced methodologies in die-level IR drop, STA, and power. The engineer should be proficient in static timing analysis using the Synopsys Primetime toolset and should have strong coding skills in scripting languages such as Python, TCL, or Perl. Domain knowledge including place and route tools and concepts, power analysis and optimization, and IR drop analysis and optimization is also helpful.

The engineer is expected to propose, develop, and validate new methodologies, engage with vendors, CAD, and design teams, and work collaboratively with worldwide teams.

Roles and Responsibilities

⦁ Develop and drive analysis and optimization methodologies for interaction of IR drop and STA

⦁ Develop physical-aware timing and IR drop ECO solutions

⦁ Collaborate closely with physical design and timing teams to drive methodologies to optimize power and minimize hotspots

⦁ Work with CAD and tool vendors to develop and validate new flows and methodologies

⦁ Work on design power profiling and electromigration analysis

⦁ Develop strategies for 3DIC PDN analysis and signoff

Required Skills and Experience :

⦁ Expertise in static timing analysis . Hands-on experience with Primetime or Tempus

⦁ In-depth knowledge of physical design, preferably but not limited to on-chip power delivery network and power optimization

⦁ Strong background on power analysis concepts and on-hands experience with PTPX etc.

⦁ Sound conceptual understanding of low power design techniques like voltage/power islands, power gating, clock gating, retention designs etc.

⦁ Strong coding skills in languages such as Python, TCL, Perl

⦁ Strong methodology development background. Ability to drive solutions by creating and implementing algorithms

⦁ Strong analysis and communication skills

Preferred Skills and Experience:

⦁ MS/PhD degree in Science, Electrical/Electronics Engineering and 6+ years of industry experience

⦁ Hands-on experience with Redhawk/RHSC or Voltus, Innovus, ICC

⦁ Good insight in designing flows and software structure

⦁ Familiarity with post-silicon concepts, such as ATPG vectors and test, silicon debug, defect and parametric limited yield

⦁ Familiarity with HSPICE and transistor-level behavior

⦁ Experience in 3DIC design

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.

OR

• Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.

OR

• PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. Qualcomm is not responsible for any fees related to unsolicited resumes/applications.

EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

Pay range and Other Compensation & Benefits:

$140,000.00 - $210,000.00

The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.

If you would like more information about this role, please contact Qualcomm Careers.

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Based on previously hired candidates

Popular Skills of Previous Hires

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Job titles of previous hires

Digital Design Engineer

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Previous hires also worked at


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