Digital Design Engineer

Meta's Reality Labs (RL) is focused on delivering Meta's vision through Virtual Reality (VR) and Augmented Reality (AR). The compute performance and power efficiency requirements of Virtual and Augmented Reality require custom silicon. The Reality Labs Silicon team is driving the state of the art forward with breakthrough work in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human body. Our chips will enable AR & VR devices where our real and virtual world will mix and match throughout the day. We believe the only way to achieve our goals is to look at the entire stack, from transistors, through architecture, firmware, and algorithms. We are growing our Machine Learning ASIC Design and µArchitecture team within RL and are seeking engineers at all levels who will work with a world-class group of researchers and engineers using your digital design skills to implement and contribute to the development and optimization of low power machine learning accelerators and state-of-the-art SoCs. As a Digital Design Engineer, you will contribute to ASIC digital µArchitecture and design for low-power machine learning hardware accelerator, assist performance/power analysis of the design and help meet the power and performance targets, work with architects to map Machine learning algorithms on the hardware, support hand-off and integration of blocks into larger SOC environments, and work across disciplines, brainstorm big ideas, and build new methodologies.