Job Description
This internship focuses on product validation within Cadence's hierarchical solution area. Responsibilities include assisting in development and validation, maintaining comprehensive unit and flow test cases for the Innovus Digital Implementation System, and developing test suites for new hierarchical functional/flow solutions. Candidates should hold an MS in microelectronics, EE, or related fields, possess digital IC design knowledge, and demonstrate strong communication skills. Familiarity with Unix systems and scripting languages like vi/TCL/TK/CSH/Perl is a plus. The role prefers a commitment of 3-4 days per week for over six months.
Good To Have:
- statistic timing analysis knowledge is a strong plus
- Unix System knowledge, vi/TCL/TK/CSH/Perl will be plus
Must Have:
- Assist in Cadence hierarchical solution area development and validation.
- Validate and maintain comprehensive hierarchical solution unit and flow test cases for Innovus Digital Implementation System.
- Develop test suites of the new features of hierarchical functional/flow solution.
- MS in microelectronics, EE and related majors.
- Digital IC design knowledge is necessary.
- Good communication in English and Chinese, good confidence and self-motivation.
The Position Description are:
- Assist in Cadence hierarchical solution area development and validation.
- Validate and maintain comprehensive hierarchical solution unit and flow test cases for Innovus Digital Implementation System.
- Develop test suites of the new features of hierarchical functional/flow solution.
The Position Requirements are:
- MS in microelectronics, EE and related majors.
- Digital IC design knowledge is necessary, statistic timing analysis knowledge is a strong plus.
- Unix System knowledge, vi/TCL/TK/CSH/Perl will be plus.
- Good communication in English and Chinese, good confidence and self-motivation.
Prefer to work 3-4 days per week for 6+ months.
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