Lead Engineer - Analog

Meet the Team

Join a dynamic Analog & Mixed Signal Design team that delivers end to end silicon—from architecture to tape out and silicon bring up. We work closely with verification, layout, packaging, and test to create high performance, low power solutions. Collaboration, innovation, and technical excellence define our culture, making this an exciting place to grow, lead, and make real impact.

About the Role

We are seeking a highly skilled Lead Engineer – Analog Design to join our Silicon Engineering team. In this role, you will drive the specification, design, verification, and optimization of advanced analog and mixed signal IP for low power IoT chips. You will own blocks from spec to tape-out and through lab characterization, while mentoring engineers and collaborating with cross functional groups.

Responsibilities

• Define the architecture and implement transistor-level design of analog and mixed-signal blocks for Power efficient Iot ICs.
• Perform pre- and post-layout simulations and analysis across PVT corners using industry-standard EDA tools
• Work closely with layout engineers to optimize performance, area, and noise/EMI sensitivity.
• Collaborate with cross-functional teams across design, verification, test, validation,
• Support silicon bring-up, characterization, and debug
• Produce high quality review and spec documents
• Promote IP reuse, documentation best practices, and patent/IP generation initiatives.
• Guide junior engineers as and when needed.

Requirements

• M.E./M.Tech or Phd in Electronics Engineering, VLSI, or related field.
• 7+ years of industry experience in analog/mixed signal IC design
• Strong hands on expertise with Industry Standard EDA tools.
• Proven background in design of state of the are analog blocks (ADC, DAC, PLL)
• Practical experience guiding layout for precision analog and closing PEX/EMIR aware performance.
• Excellent problem solving, leadership, and communication skills; ability to drive cross functional decisions.
• Preferred Qualifications
• Silicon proven design experience one or more IP classes: PLLs/clocking, data converters (ADC/DAC), LDO/DCDC and power management, bandgaps/references, sensor interfaces.
• Background in low power techniques, multi supply/multi domain integration.
• Understanding of yield/risk management (corner selection, guard banding, mismatch budgeting).

Benefits & Perks

You’ll be part of a highly skilled team where every engineer makes a meaningful impact. We promote work-life balance and a welcoming, fun environment.

• Equity Rewards (RSUs)
• Employee Stock Purchase Plan (ESPP)
• Insurance plans with outpatient cover
• National Pension Scheme (NPS)
• Flexible work policy
• Childcare support

We are an equal opportunity employer and values the diversity of our employees. Employment decisions are made on the basis of qualifications and job-related criteria without regard to race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status, or any other characteristic protected by applicable law.