Physical Design Engineer, Lead

17 Hours ago • 7 Years + • Software Development & Engineering

Job Summary

Job Description

As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. This role focuses on ASIC design, specifically Snapdragon CPU design and flows for high-performance SoCs in sub-10nm processes for Mobile, Compute, and IoT markets. You will be involved in Place and Route Implementation, Timing Closure, Low Power, Power Analysis, and Physical Verification, optimizing Performance, Power, and Area (PPA).
Must have:
  • Participate in ASIC development with emphasis on Place and Route Implementation, Timing Closure, Low Power, Power Analysis, and Physical Verification.
  • Create design of experiments and perform detailed PPA comparison analysis to improve quality of results.
  • Work closely with RTL design, Synthesis, low power, Thermal, Power analysis, and Power estimation teams to optimize PPA.
  • Tabulate metrics results for analysis comparison.
  • Develop Place & Route recipes for optimal PPA.
  • 7+ years of High Performance core Place & Route and ASIC design Implementation work experience.
Good to have:
  • Extensive experience in Place & Route with FC or Innovus.
  • Complete ASIC flow with low power, performance, and area optimization techniques.
  • Experience with STA using Primetime and/or Tempus.
  • Proficient in constraint generation and validation.
  • Experience of multiple power domain implementation with complex UPF/CPF definition.
  • Formal verification experience (Formality/Conformal).
  • Perl/Tcl, Python, C++ skills.
  • Strong problem solving and ASIC development/debugging skills.
  • Experience with CPU micro-architecture and their critical path.
  • Low power implementation techniques experience.
  • High speed CPU implementation.
  • Clock Tree Implementation Techniques for High Speed Design Implementation.
  • Exposure to Constraint management tool and Verilog coding experience.
Perks:
  • World-class health benefit option providing world-class coverage to employees and their eligible dependents.
  • Programs designed to help employees build and prepare for a financially secure future.
  • Self and family resources to build emotional/mental strength and resilience, and define purpose.
  • Wellbeing programs and resources to help employees Live+Well and Work+Well.

Job Details

General Summary:

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.

OR

Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

OR

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

We are looking for bright ASIC design engineers with excellent analytical and technical skills. This is an excellent opportunity to be part of a fast paced team responsible for delivering Snapdragon CPU design, flows for high performance SoCs in sub-10nm process for Mobile, Compute and IOT market space.

· Participate on a project involved in the development of ASICs, with emphasis in Place and Route Implementation, Timing Closure, Low Power, Power Analysis and Physical Verification.

· Create design of experiments and do detailed PPA comparison analysis to improve quality of results, tuning recipes and setting course for the projects going forward

· Work closely with RTL design, Synthesis, low power, Thermal, Power analysis and Power estimation teams to optimize Performance, Power and Area(PPA)

· Tabulate metrics results for analysis comparison

· Develop Place & Route recipes for optimal PPA

Minimum Qualifications

· 7+ years of High Performance core Place & Route and ASIC design Implementation work experience

Preferred Qualifications

· Extensive experience in Place & Route with FC or Innovus is an absolute must

· Complete ASIC flow with low power, performance and area optimization techniques

· Experience with STA using Primetime and/or Tempus is required

· Proficient in constraint generation and validation

· Experience of multiple power domain implementation with complex UPF/CPF definition required

· Formal verification experience (Formality/Conformal)

· Perl/Tcl, Python, C++ skills are needed

· Strong problem solving and ASIC development/debugging skills

· Experience with CPU micro-architecture and their critical path

· Low power implementation techniques experience

· High speed CPU implementation

· Clock Tree Implementation Techniques for High Speed Design Implementation are required

· Exposure to Constraint management tool and Verilog coding experience

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About The Company

Our employees make Qualcomm’s success possible. We hire the brightest minds and foster a supportive, inclusive culture where your ideas have the power to contribute to world-changing innovations and breakthrough technologies. To make that possible, we leverage the breadth and depth of our diverse expertise from around the world to answer the unasked, conquer the complex, and solve some of the biggest challenges only we can – together.

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