Pre-Silicon Validation Engineer

undefined ago • 3-8 Years • Quality Assurance

Job Summary

Job Description

This role involves participating in and leading the pre-Silicon verification of IP, Sub-systems, and SoC for Intel's Ethernet products. Responsibilities include executing validation plans, debugging failures, creating and reviewing test plans, developing UVM verification environments, and running tests in System Verilog. The engineer will also mentor others, support post-silicon failures, and collaborate with global teams to ensure timely delivery of high-quality network technologies.
Must have:
  • Participate and lead the verification of IP, Sub-systems and SoC.
  • Execute pre-Silicon validation plans as per IP/product release schedule and deliverables.
  • Carry out debug, report failures, and help with root-causing failures.
  • Create/review verification test plans.
  • Develop the architecture and design of the verification environment in UVM for pre-silicon RTL verification.
  • Develop, run, and debug tests in System Verilog.
  • Mentor other engineers in using the verification infrastructure and creating test benches.
  • Work on verification of block/sub-system/SoC level testing.
  • Participate in functional coverage and code coverage reviews.
  • Support post-silicon/platform failures related to the IP provided.
  • Achieve goals in timely fashion.
  • Work with teams across different geographies.
Good to have:
  • High Proficiency in UVM (ability to architect complex testbenches, verification infrastructure, debugging and issue resolution)
  • AXI, AHB, APB, ACE, AXI Stream protocol knowledge
  • Fundamentals of A-profile Cores
  • Networking Protocols such as PCIe, Ethernet, RDMA, NVME
  • Experience on Networking flows
  • Experience in DDR

Job Details

Job Description:

About our Group: Intel NEX team delivers best-in-class Ethernet products and is at the heart of Intel's transformation from a PC company to a company that powers the cloud and billions of smart, connected computing devices. NEX's compelling Ethernet products move the world's data and are the foundations of cloud service and telecommunications data centers. We are a team of problem solvers, experimenters, and innovators who are dedicated to designing the network technologies that currently lead and continue to transform datacenter ecosystems. As a world-class organization, we're looking for outstanding talent to accelerate our growth during an exciting time in Ethernet networking marketing technology. If you're ready to be a part of this journey, then we want to hear from you

In this position, you will participate and lead the verification of IP, Sub-systems and SoC. You will focus on executing pre-Silicon validation plans as per the IP/product release schedule and deliverables, and carry out debug, report failures, report potential failures and help with root-causing the failures. You will be required to create/review verification test plans, drive/participate in discussions across various disciplines to get a clear understanding of requirements, develop the architecture and design of the verification environment in UVM for pre-silicon RTL verification, develops/run/debug tests in System Verilog, mentor's other engineers in using the verification infrastructure and creating test benches. You may work on verification of block/ss/SoC level testing, participate in functional coverage, code coverage reviews and implement feedback. You should also be able to support post-silicon/platform failures related to the IP provided. You should be able to achieve goals in timely fashion, bring out pointers to management on issues and roadblocks on a timely basis and be able to work with teams across different geographies.

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