The Silicon Validation Engineer will be responsible for developing DDR PHY/DRAM initialization drivers and firmware for memory tuning and optimization. This role involves participating in pre/post-silicon bring-up of memory subsystems, validating silicon features for DDR/GDDR/HBM, and contributing to test plan execution and failure analysis. Candidates should have a minimum of 3 years of firmware experience in a post-silicon validation environment, expertise in DDR initialization, and strong debugging skills.
Must Have:
Minimum of 3 years of experience with firmware in a post-silicon validation environment
Working experience with DDR4/5 controller and PHY, JEDEC and DFI specifications
Expertise in DDR initialization firmware, controller features, equalization features validation, and related tuning
Deep understanding of server boot-up flow, specifically DDR initialization process
Strong debugging skills at both SoC and system levels, including DDR protocol-level and signal integrity-level issues
Experience in DDR RAS, Performance, Power features, and related firmware routines for tuning/optimization
Experience in microcontroller and embedded systems programming using C/C++
Proficiency in script languages such as Perl or Python, Linux shell script
Must be a self-starting team player who can work with minimal guidance
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Responsibilities and Opportunities
Develop DDR PHY/DRAM initialization drivers and conduct testing
Develop firmware for memory tuning and optimization routines
Participate in pre/post-silicon bring-up(power-on) of memory subsystems
Develop software routines for DDR PHY/DRAM initialization, training, equalization, IO tuning, SI/PI optimization, etc.
Validate and characterize the silicon features for DDR/GDDR/HBM
Contribute to writing test conditions, executing test plans in pre/post-silicon environments, perform failure analysis to identify root causes, and develop innovative solutions
Key Qualifications
Minimum of 3 years of experience with firmware in a post-silicon validation environment
Working experience with DDR4/5 controller and PHY, JEDEC and DFI specifications
Expertise in DDR initialization firmware, controller features, equalization features validation, and related tuning
Deep understanding of server boot-up flow, specifically DDR initialization process
Strong debugging skills at both SoC and system levels, including DDR protocol-level and signal integrity-level issues
Experience in DDR RAS, Performance, Power features, and related firmware routines for tuning/optimization
Experience in microcontroller and embedded systems programming using C/C++
Proficiency in script languages such as Perl or Python, Linux shell script
Must be a self-starting team player who can work with minimal guidance
The hiring process may vary by job role and may change depending on schedule and circumstances.
The hiring schedule and results will be individually notified to the email address you provided when applying.
Notes
This announcement may close early if recruitment is completed.
If there are false facts in the application, the acceptance may be canceled.
If the legal qualifications required for employment and job performance are not met, employment may be restricted.
Being a veteran or a person with a disability does not negatively affect the hiring process.
The scope of duties may be changed considering the candidate's overall career and experience. If such a change is necessary, it will be communicated to the candidate at an appropriate time before the final acceptance notification.
For inquiries related to recruitment, please contact the email address below.
recruit@rebellions.ai
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