This job involves collaboration across multiple fields and contributing to the delivery of innovative products to millions of customers. You'll have the opportunity to develop new insights into silicon optimization and collaborate with architects, silicon design engineers, and software developers. You'll also be involved in silicon/model correlation efforts for mobile SoC design. Your primary responsibilities include modeling power dissipation at the SOC level, encompassing neural engines, CPUs, graphics, compute (AI/ML) accelerators, media IPs, caches, and fabric. Furthermore, you will model power dissipation for customer use cases, interact with system designers, the technology team, silicon validation teams, and product engineering teams to define power targets at the SOC level and the power delivery. You will also work with the power lab and test teams to correlate models with silicon data.