As part of the HDD modelling team, the candidate will work on developing, maintaining and testing the SoC models using C#. These models capture the register accurate functionality of the controller chip which manages the HDD/NAND storage, helping shorten SDLC and facilitate shift left. The role involves understanding SoC and Memory Architecture, implementing new HW IPs/features, debugging in Co-Simulation Environment, and interacting with Design/Verification teams. The engineer will partner with firmware development in embedded C++ and participate in SAFe/SCRUM/Agile processes to deliver cutting-edge storage products with interfaces like SAS, SATA, PCIe, working with cross-functional teams.