Infinera is revolutionizing telecommunications networks with innovative, industry-leading connectivity solutions. Our offerings include high-end subcomponent technology, systems for network infrastructure, automation software, advanced optical compound semiconductor manufacturing, &amp; professional services. As a global supplier, we empower mobile service providers, internet content providers, cloud operators, submarine operators, governments &amp; enterprises to scale network bandwidth, boost service innovation, and automate network operations. We are committed to continuously expanding and enhancing our world-class offerings to meet the changing needs of more than 1,000 customers in over 100 countries across six continents.Our connectivity solutions are powered by the world’s best embedded &amp; pluggable optical engines, which are designed, developed &amp; manufactured in Infinera’s U.S.-based optical semiconductor fabrication center and are application-optimized for edge, metro, long-haul, and submarine transport networks. Our agile, open, compact &amp; modular networking platforms enable network operators to rapidly and easily take advantage of best-in-class technology. Our software automation solutions optimize traffic flows and automate workloads to enable network operators to cost-effectively deliver secure bandwidth to their customers where and when needed. With these solutions, our goal is to create a connected world with unlimited bandwidth for everyone – everywhere, always, and instantly. What Inspires Us?&nbsp; A connected world with unlimited bandwidth for everyone – everywhere, always &amp; instantly.What Motivates Us? Delivering innovative and impactful coherent optical technologies and open optical solutions that unlock new value for our customers.What Drives Us? To be a valued investment for our shareholders’ money, our customers’ CapEx and our employees’ time by delivering an unrivaled customer experience from an inclusive culture of innovation for our customers.

Infinera

ASIC Physical Design Engineer

Senior Engineer - Design

Infinera is seeking an ASIC Physical Design Engineer with 2+ years of experience in 5/7nm and 16nm process nodes. Must have expertise in floor planning, place & route, power/clock distribution, timing closure, and EDA tools like ICC2 or Innovus. Experience with scripting languages like TCL, python, or perl is required. A Bachelor's Degree in relevant field is a must.

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 Infinera is a global supplier of innovative networking solutions. Our customers include the leading service providers, data center operators, internet content providers (ICPs), cable operators, enterprises, and government agencies worldwide, including 9 of the top 10 Tier 1 service providers and 6 of the top 7 ICPs. We design, develop and deliver hardware and software for fiber-based connectivity solutions that span access, aggregation, metro, long haul, and submarine network. Our industry-leading, trendsetting edge-to-core solutions provide the foundation for many of the world’s largest and most demanding networks that generate billions in service revenue for our customers. Title: ASIC Physical Design EngineerLocation: India <ul><li>Your Key Responsibilities Would Include:</li><li>Perform physical implementation steps including floor planning, place and route, power/clock distribution for congestion analysis and timing closure at block level as well as full chip</li><li>Work with logic designers to drive feasibility studies and explore design trade-off for physical design closure</li><li>Perform technical evaluations of vendor, process nodes and IP and provide recommendations</li><li>Develop physical design methodologies and automation scripts for various implementation steps from Synthesis to GDSII</li><li>Perform static timing analysis, create timing constraints and validation, critical path analysis, timing closure and timing sign-off</li></ul>
 <ul><li>Education &amp; Experience Necessary For Success:</li></ul>
 <ul><li>2+ years of experience in ASIC physical design flow and methodologies in 5/7nm and 16nm process nodes</li><li>Has solid knowledge of full design cycle from RTL to GDSII and understanding of underlaying concepts of IC design, implementation flows and methodologies for deep submicron design</li><li>Experience with EDA Place &amp; Route tools like ICC2 or Innovus or similar tools and Timing tools like Primetime or similar</li><li>Scripting experience in TCL, python or perl</li><li>Candidates must have a Bachelor's Degree or higher in Electrical/Electronics and Communication/VLSI/Microelectronics with very good academics..</li></ul>

 
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