Cores Verification Engineer

9 Months ago • 3-5 Years
Research Development

Job Description

The Cores Verification Engineer contributes to verifying processor cores and subsystems, ensuring robust performance and functionality for high-performance computing. Responsibilities include developing verification environments in C++, implementing OOP principles, creating and executing test plans for x86-based cores, validating computer architecture designs (focusing on x86 assembly language), collaborating with hardware and software teams, and performing formal verification. This role is crucial for developing cutting-edge computing architectures. The position requires proficiency in C++, OOP, and/or x86 assembly language, a solid understanding of computer architecture (especially x86), experience with digital design (Verilog), and familiarity with formal verification techniques.
Good To Have:
  • Building and debugging architectural models
  • Modern verification methodologies
  • Hardware design performance optimization
Must Have:
  • C++, OOP, x86 assembly language
  • Computer architecture (x86)
  • Digital design (Verilog)
  • Formal verification

Add these skills to join the top 1% applicants for this job

assembly-language
problem-solving

Project description

Contribute to the verification of processor cores and their subsystems, ensuring robust performance and functionality for high-performance computing solutions. This role is essential to the development of cutting-edge computing architectures.

Responsibilities

Develop verification environments in C++ and implement object-oriented programming principles

Create and execute test plans for x86-based cores

Validate computer architecture designs, focusing on x86 assembly language

Collaborate with hardware and software teams to achieve verification goals

Perform formal verification to ensure core functionality and reliability

Skills

Must have

Proficiency in C++, OOP, and/or x86 assembly language

Solid understanding of computer architecture, particularly x86

Experience with digital design (Verilog)

Familiarity with formal verification techniques

Nice to have

Experience building and debugging architectural models

Exposure to modern verification methodologies

Knowledge of performance optimization in hardware design

Other

Languages

English: B2 Upper Intermediate

Seniority

Senior

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