DMTS Hardware Engineer

4 Months ago • 12 Years + • $164,000 PA - $320,900 PA
Software Development & Engineering

Job Description

The Distinguished Hardware Engineer will play a key role in developing Calix's next-generation PON intellectual property, utilizing FPGAs, ASICs, and hybrid SOCs. Responsibilities include analyzing product requirements, developing RTL code, supporting existing FPGA-based products, developing simulation models, authoring patents and papers, evaluating technology partners, participating in standards bodies, guiding technical discussions, and resolving field issues. The role requires a deep understanding of high-speed transceivers and point-to-multipoint PON networks, with a focus on innovation and thought leadership within the optical networking field.
Must Have:
  • 12+ years of hardware engineering experience
  • 10+ years experience with FPGA development
  • RTL (Verilog / VHDL) Proficiency
  • Work independently in a fast-paced environment
  • Experience with high-speed transceivers
  • Understanding of point-to-multipoint PON networks
Perks:
  • Benefits - see company website

Add these skills to join the top 1% applicants for this job

problem-solving
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Calix provides the cloud, software platforms, systems and services required for communications service providers to simplify their businesses, excite their subscribers and grow their value.

Calix is leading a service provider transformation to deliver a differentiated subscriber experience around the Smart Home and Business, while monetizing their network using Role based Cloud Services, Telemetry, Analytics, Automation, and the deployment of Software Driven Adaptive networks.  Calix's experience platform is built upon state-of-the-art optical networking architectures that continue to advance in support of this mission.

As part of a high performing global team, the right candidate will play a lead role as a Distinguished Hardware Engineer focused on future silicon technology and how this can be used to realize Calix next-generation PON intellectual property.  FPGAs, ASICs, and hybrid SOCs will play an important role in the future of Calix products.

Responsibilities and Duties:   

  • Work closely with product owners to understand, analyze product requirements, and provide feedback on technical direction and feasibility.
  • Develop RTL code for Calix next-generation PON IP
  • Support the existing install base of FPGA-based products.
  • Develop conceptual, logical, and physical simulation models for Calix optical networks
  • Author patents, papers, and industry talks around optical networking technology
  • Author trade studies by evaluating technology partners and their place within the Calix hardware ecosystem.
  • Participate in relevant standards bodies and author technical contributions to advance the industry and promote thought leadership for Calix.
  • Guiding technical discussions within engineer group and making technical recommendations. Design review and code review with peer engineers
  • Customer facing engineering role in debugging and resolving field issues.
  • Clearly communicate complex architectural decision points to executive management.

 

Qualifications:

  • This role may be required to travel and attend face-to-face meetings and Calix sponsored events.
  • 12+ years of hardware engineering and architecture with experience delivering mission critical products.
  • 10+ year's experience with FPGA development.
  • RTL (Verilog / VHDL) Proficiency
  • Demonstrated ability to work independently in a fast-paced, often ambiguous environment
  • Experience with high-speed transceivers at 25G and above including PAM-4 modulation, transmission line theory, trans-impedance amplifiers,
  • Understanding of point-to-multipoint PON networks
  • Comfortable with scripting languages such as Python, Perl, TCL, or equivalent.
  • BS degree in Computer Science, engineering, or mathematics or equivalent experience.

Location:

  • Remote-based position located in the United States.

#LI-Remote

Compensation will vary based on geographical location (see below) within the United States. Individual pay is determined by the candidate's location of residence and multiple factors, including job-related skills, experience, and education.

For more information on our benefits click here.

There are different ranges applied to specific locations. The average base pay range (or OTE range for sales) in the U.S. for the position is listed below.

San Francisco Bay Area Only:

188,600.00 - 320,900.00 USD Annual

All Other Locations:

164,000.00 - 279,000.00 USD Annual

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