Senior DFT Engineer

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General Summary:

Minimum Qualifications:

Minimum of 3+ years’ experience in the area of DFT-, ATPG, Scan Insertion, MBIST, JTAG
-In depth knowledge of DFT concepts.
-In depth knowledge and hands on experience in DFT(scan/mbist) insertion, ATPG pattern generation/verification, mbist verification and post silicon bring up/yield analysis
-Expertise in test mode timing constraints definition, knowledge in providing timing fixes/corrective actions for timing violations.
-Ability to analyze and devise new tests for new technologies/custom RAM design/RMA etc.
-Expertise in scripting languages such as perl, shell, etc.
-Experience in simulating test vectors.
-Knowledge of equivalence check and RTL lint tool (like spyglass).
-Ability to work in an international team, dynamic environment
-Ability to learn and adapt to new tools and methodologies.
-Ability to do multi-tasking & work on several high priority designs in parallel.  
-Excellent problem-solving skills

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