ASIC Verification Engineer - UVM

1 Month ago • 3 Years + • Software Development & Engineering

Job Summary

Job Description

AFRY is seeking skilled ASIC verification engineers with UVM knowledge to join their expanding teams. You will contribute to exciting, cutting-edge projects within the telecom sector, working on new and existing ASIC projects. Responsibilities include applying UVM verification and SystemVerilog methodologies to complex ASIC and large FPGA designs, and potentially IP block verification. The role involves working with multi-clock domains and requires good English communication skills.
Must have:
  • 3+ years of ASIC verification experience
  • UVM verification and SystemVerilog
  • Complex ASIC/FPGA design experience
  • IP block verification experience
  • Multi-clock domain experience
  • Good English skills
Good to have:
  • RTL design (Verilog, VHDL, SystemVerilog)
  • Leadership qualities
  • Scripting skills
  • Lab experience
  • Telecommunication experience
Perks:
  • Permanent position
  • 28 days annual leave
  • Collective agreement
  • Pension
  • Competence development
  • Health care allowance
  • Access to Club AFRY & AFRY Cottages

Job Details

Company Description

AFRY is a European leader in engineering, design, and advisory services, with a global reach. We accelerate the transition towards a sustainable society.

We are 19,000 devoted experts in infrastructure, industry, energy and digitalisation, creating sustainable solutions for generations to come.

Making Future.

Job Description

Are you an ASIC-verification engineer with deep UVM-knowledge looking for your next challenge?

Do you want to be part a flexible company with multiple opportunities?

Would you like to participate in exciting cutting-edge projects?

In that case we have the right position for you! We are currently expanding existing teams to contribute in bringing bright ideas and complex designs to life. Therefor we are looking for skilled ASIC-verification engineers in UVM to join us and be part of successful a group. You will be involved in new and existing ASIC projects within telecom. 

Keywords: ASIC, Verilog, FPGA, Developer, Embedded Systems, Consulting, Consultant, Design System Architect, Verification, lab, SystemVerilog, UVM.

Qualifications

In all our recruitments we attach great importance to personal qualities. If you can recognize yourself in our key values - BRAVE, DEVOTED, TEAM PLAYERS - maybe we're the employer you are looking for?

We think that you have good cooperation skills and that you like to take responsibility!

Preferably you already reside in Sweden, but for the right talent we offer a relocation package to move to Stockholm with your family.

Knowledge and experience:

·       You have a solid background with more than 3+ years of experience of ASIC verification

·       Good command of UVM verification and SystemVerilog

·       Used to work with complex ASIC and/or large FPGA design

·       Experience from IP block verification

·       Multi clock domains

·       Good English skills, in both speech and writing

Meritorious if you have:

  • RTL design within Verilog, VHDL and/or SystemVerilog
  • Leadership qualities
  • Scripting skills
  • Lab experience
  • Telecommunication

Additional Information

  • Permanent position
  • 28 days annual leave
  • Collective agreement
  • Pension
  • Competence development
  • Health care allowance 
  • Access to Club AFRY & AFRY Cottages 

Contact information: 

Maja Lindqvist
Recruitment Partner
maja.lindqvist@afry.com  

Jihad Daoud
Section Manager 
jihad.daoud@afry.com

 

 

At AFRY, we engineer change in everything we do. Change happens when brave ideas come together. When we collaborate, innovate technology, and embrace challenging points of view. That’s how we're making future. We are actively looking for qualified candidates to join our inclusive and diverse teams across the globe. Join us in accelerating the transition towards a sustainable future.

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