ASICS Design Engineer

4 Months ago • 2 Years +

Software Development & Engineering

Job Description

This ASICS Design Engineer role involves developing ARM/RISC-V architecture based complex CPU subsystems. Responsibilities include CPU sub-system feature enhancement, micro-architecture, RTL development, integration of CPU and other IPs, design delivery process ownership, and enabling verification and implementation improvements. The engineer will also be involved in post-silicon bring-up and debug processes. The work environment is dynamic, consumer-oriented, and places a high emphasis on time-to-market and quality.

Good To Have:

5+ years of design development experience.
Experience with ARM/MIPS/x86 CPU subsystem micro-architecture and design.
Knowledge of ARM AMBA (CHI/ACE/AXI/AHB/APB) bus specifications.
Experience with ARM or RISC-V Architecture for cores and interrupt controller.
Familiarity with L1, L2 or L3 caching schemes.

Must Have:

Bachelor's degree in Engineering or related field.
2+ years of ASIC design experience.
Good knowledge of computer architecture and ASIC design flow.
Experience in simulation systems, verdi, and Linting tools.
Familiarity with static timing analysis, CDC, DFT and mbist.
Excellent communication and teamwork skills.
Good English verbal and writing skills.

Add these skills to join the top 1% applicants for this job

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Company:

Qualcomm Semiconductor Limited

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

Position corresponds to development of ARM/RISC-V architecture based complex CPU subsystem. Engineer will work in a dynamic and consumer oriented environment where both time to market and quality are extremely important. CPU sub-system design development includes:

CPU sub-system feature enhancement, micro-architecture, and RTL development
Integration of CPU and other relevant IPs into the CPU sub-system
Design delivery process ownership and co-ordination for the complex multi-voltage, power domain sub-system
Enablement of verification, constraint reviews and implementation improvement
Involvement of post-silicon bring up and debug

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field.

Basic Qualifications

Good knowledge of computer architecture, ASIC design flow and DV methodologies
Experience in using tools including simulation systems, verdi, and Linting etc.
Familiar with static timing analysis, CDC, DFT and mbist.
Excellent communication, interpersonal and teamwork skills
Good communicator in verbal and writing in English

Preferred Qualifications

5+ years of design development experience including U-architecture and RTL development in the following areas
ARM/MIPS/x86 CPU subsystem micro-architecture and design
ARM AMBA (CHI/ACE/AXI/AHB/APB) bus specifications
ARM or RISC-V Architecture for cores and interrupt controller
L1, L2 or L3 caching schemes

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