CPU Design Timing Engineer
Apple
Job Summary
At Apple, new ideas quickly become extraordinary products, services, and customer experiences. Bring passion and dedication to your job to accomplish great things. Dynamic, hardworking people and inspiring, innovative technologies are the norm. Employees have reinvented entire industries with Apple Hardware products. This role involves all aspects of timing, including working with implementation and RTL teams on timing changes, assisting with the construction and modification of timing flows, timing analysis, and timing closure. You will be responsible for the timing closure of the project, working with the CAD team to develop the timing flow, scripting to improve analysis flows and engineer efficiency, and driving timing closure for the CPU.
Must Have
- Minimum BS and 3+ years of relevant industry experience
- Experience with script writing and debugging in TCL, Perl, or Python
Good to Have
- Implementation experience on high performance CPU designs
- Working knowledge of CPU microarchitecture
- Understanding of low power microarchitecture and implementation techniques for CPUs
- Good understanding of physical design tools and methodology
- Experience working on timing for 1 GHz+ designs
- Experience with static timing tools (Primetime or Tempus)
- Experience with cross talk, noise, OCV, uncertainty, and derate methodology
Job Description
CPU Design Timing Engineer
- Minimum BS and 3+ years of relevant industry experience
- Experience with script writing and debugging in one or more of the following languages: TCL, Perl, Python
- Implementation experience on high performance CPU designs
- Working knowledge of CPU microarchitecture including common critical loops for timing and understanding of low power microarchitecture and implementation techniques for CPUs
- Good understanding of physical design tools and methodology including but not limited to physically aware synthesis and place & route tools and flows, extraction, and other analysis flows, and physical design verification (LEC, DVS, etc.)
- Experience working on timing for 1 ghz+ designs, including how to handle multiple clock and power domains
- Experience with one of the following static timing tools: Primetime or Tempus
- Experience with cross talk, noise, OCV, uncertainty, and derate methodology
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.
