Experienced Verification Engineer

12 Hours ago • 3 Years + • Software Development & Engineering

Job Summary

Job Description

Performs functional verification of IP logic to ensure design meets specification requirements. Develops IP verification plans, test benches, and the verification environment to ensure coverage. Executes verification plans and runs system simulation models to verify the design, analyze power and timing, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews. Maintains and improves existing functional verification infrastructure and methodology. Participates in the definition of verification infrastructure and related TFMs needed for functional design verification.
Must have:
  • 3 years of experience in design verification
  • Proficiency in System Verilog UVM
Good to have:
  • Verification block level experience
  • Super Cluster experience
  • Scripting language abilities

Job Details

Job Details:

Job Description: 

Performs functional verification of IP logic to ensure design will meet specification requirements. Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to microarchitecture specifications. Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Maintains and improves existing functional verification infrastructure and methodology. Participates in the definition of verification infrastructure and related TFMs needed for functional design verification.

Qualifications:

  • At least 3 years of experience in design verification.
  • Proficiency in System Verilog UVM.

Preferred Qualifications:

  • Verification block level and Super Cluster experience.
  • Scripting language abilities.

          

Job Type:

Experienced Hire

Shift:

Shift 1 (Israel)

Primary Location: 

Israel, Petah-Tikva

Additional Locations:

Israel, Haifa

Business group:

The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership. It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

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