Hardware Design Engineer (TNH - 001)

SageCor Solutions is seeking a Hardware Design Engineer to provide engineering services in high-performance computing and large data analytics. The role involves VHDL, Verilog, or SystemVerilog RTL coding, FPGA design, and working with Linux/Windows OS. Candidates should have an active TS/SCI Clearance with Full-Scope Polygraph and a minimum of three years of experience in integrated circuit or microelectronic component design. The position is primarily onsite in Fort Meade, MD, with potential for hybrid remote work.

Must Have

• Possess an active TS/SCI Clearance with Full-Scope Polygraph
• Experience using VHDL, Verilog or SystemVerilog RTL Coding (for design and/or analysis of digital circuits)
• Experience with FPGA Design, synthesis, P&R tools (ex Vivado, Quartus)
• Experience utilizing Verilog/System and Verilog test bench development
• Experience working with Linux/Windows OS
• Knowledge of design simulation tools (Mentor, Cadence, Synopsys - 1 or more)
• Strong oral/written communication
• Minimum three (3) years’ experience as a Design Engineer in integrated circuit or microelectronic component design or reverse engineering of the same
• Bachelor’s degree in electrical engineering or computer engineering from an accredited college or university is required (or five years of additional hardware design engineering experience)

Good to Have

• Experience with C/C++, Bash, Tcl/TK, GitLab
• Experience with FPGA design using Xilinx's Vivado Tool Suite
• Experience using soft/hard IP cores in FPGAs/ASICs (ex Zynq or Microblaze or RISC processors, memories, flash/NVM)
• Exposure to embedded software development
• Exposure to PCB design and development
• Python scripting

Perks & Benefits

• Up to 20 hours of remote work per week once established and approved by the Customer

Description

Serving Maryland and the Greater Washington D.C. area, SageCor Solutions (SageCor) is a growing company bringing complete engineering services and true full lifecycle System Engineering services to areas requiring (or desiring) nationally-recognized expertise in high performance computing, large data analytics and cutting edge information technologies.

Active TS/SCI w/ Polygraph required.

Qualifications:

• Must possess an active TS/SCI Clearance with Full-Scope Polygraph
• Experience using VHDL, Verilog or SystemVerilog RTL Coding (for design and/or analysis of digital circuits)
• Experience with FPGA Design, synthesis, P&R tools (ex Vivado, Quartus)
• Experience utilizing Verilog/System and Verilog test bench development
• Experience working with Linux/Windows OS
• Knowledge of design simulation tools (Mentor, Cadence, Synopsys - 1 or more)
• Strong oral/written communication
• May provide FPGA support for vulnerability assessments, circuit analysis and/or reverse engineering efforts
• Location is onsite at Fort Meade, MD
• May have up to 20 hours of remote work per week once established and approved by the Customer

Desired Skills:

• Experience with C/C++, Bash, Tcl/TK, GitLab
• Experience with FPGA design using Xilinx's Vivado Tool Suite
• Experience using soft/hard IP cores in FPGAs/ASICs (ex Zynq or Microblaze or RISC processors, memories, flash/NVM)
• Exposure to embedded software development
• Exposure to PCB design and development
• Python scripting

Required Experience:

Multiple openings for Junior, Senior, Principal and Sr. Principal Engineers: Minimum three (3) years’ experience as a Design Engineer in integrated circuit or microelectronic component design or reverse engineering of the same is required. Bachelor’s degree in electrical engineering or computer engineering from an accredited college or university is required. Five (5) years of additional hardware design engineering experience may be substituted for a bachelor’s degree.

Consistent with federal and state law where SageCor conducts business, SageCor Solutions provides equal employment opportunities (EEO) to all employees and applicants for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability or veteran status, or any other protected class.