Physical Design Clock Distribution Engineer

19 Minutes ago • 3 Years + • Network Engineering • $153,540 PA - $216,770 PA

Job Summary

Job Description

Intel is seeking a Physical Design Clock Distribution Engineer to join a premier Xeon design team. This role involves defining and developing physical clock architecture, driving clocking designs, creating methodologies, and implementing solutions for IPs or SoCs. Responsibilities also include designing new clock modules, building simulation models, conducting clock analysis, and collaborating with architecture and design teams to meet power and performance requirements. The ideal candidate will contribute to world-changing technology, building a better tomorrow with Intel.
Must have:
  • Define and develop physical clock architecture.
  • Drive clocking designs and create methodologies for IPs or SoCs.
  • Design new clock modules and circuit solutions.
  • Implement solutions meeting security and safety compliance for clocking.
  • Define SoC or subsystem level clocking targets.
  • Build simulation models and drive physical implementation.
  • Conduct clock analysis and support power grid methodologies.
  • Create scalable flows for clocking infrastructure.
  • Interact with architecture and IP/SoC design teams.
  • Bachelor's degree in Computer or Electrical Engineering with 4+ years of industry experience OR Master’s with 3+ years.
  • 3+ years experience with SoC clocking architecture from PLL to partition implementation with Clock Tree Synthesis.
  • Experience with industry standard clock distribution CAD tools like Clock Builder.
Good to have:
  • Experience as technical leader of SOC/ASIC designs responsible for physical clock design and convergence.
Perks:
  • Competitive pay
  • Stock options
  • Bonuses
  • Health benefits
  • Retirement programs
  • Vacation

Job Details

Job Description:

Do Something Wonderful!

Intel put Silicon in Silicon Valley. No one else is obsessed with engineering and have a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow.

Who We Are

We are a premier Xeon design team in Intel that owns the physical design of custom Xeon based SoCs for high profile external clients

Who You Are

Your responsibilities will include but not be limited to:

  • Defines and develops physical clock architecture, drives clocking designs, and creates clocking methodologies and guidelines for IPs or SoCs.
  • Designs new clocks modules and circuit solutions and implements solutions that meet security and safety compliance for IP or SoC clocking.
  • Defines SoC or subsystem level clocking targets and drives design teams to achieve these objectives as required.
  • Build simulation models, drives physical implementation, conducts clock analysis, and supports power grid methodologies and implementation.
  • Creates scalable flows for clocking infrastructure for better performance and power in the design.
  • Interacts with architecture and IP/SoC design teams to understand clocking requirements and help them in deciding the right clock distribution methodology based on power and performance requirements.
  • Proven track record of strong partnership and collaboration with managers, architecture, RTL design and other partner teams.
  • In addition to the qualifications listed below, the ideal candidate will also have strong written and verbal communication skills.

Qualifications:

You must possess the minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications

  • The candidate must have a Bachelor's degree in Computer or Electrical Engineering with 4+ years of industry experience -OR- a Master’s Degree in Computer or Electrical Engineering with 3+ years of industry experience.
  • 3+ years of experience with SoC clocking architecture from PLL to partition implementation with Clock Tree Synthesis and have experience with industry standard clock distribution CAD tools such as Clock Builder.

Preferred Qualifications

  • Experience as technical leader of SOC/ASIC designs responsible for physical clock design and convergence.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location:

Virtual US

Additional Locations:

Business group:

The Silicon Engineering Group (SIG) is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs from architecture to manufacturing readiness that power Intel’s leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003

Annual Salary Range for jobs which could be performed in the US:

$153,540.00-$216,770.00

Salary range dependent on a number of factors including location and experience.

Work Model for this Role

This role is available as a fully home-based and generally would require you to attend Intel sites only occasionally based on business need. However, you must live and work from the country specified in the job posting, in which Intel has a legal presence. Due to legal regulations, remote work from any other country is unfortunately not permitted. * Job posting details (such as work model, location or time type) are subject to change.

The application window for this job posting is expected to end by 09/09/2026

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