Physical Design Engineer Intern - Bachelors Degree

11 Minutes ago • All levels
Physics Engine

Job Description

The Backend Group at Marvell is seeking a Physical Design Engineer Intern to contribute to the physical design and implementation of switching chips. The role involves developing and supporting block-level and partition-level construction and signoff flows using industry-standard EDA tools. Responsibilities include performing synthesis, PnR, timing analysis, backend checks, and implementing timing/logic ECOs, while collaborating with RTL design and global timing teams to resolve issues.
Good To Have:
  • Strong scripting skills in languages such as Perl, tcl, or Python.
  • Object-oriented programming skills.
Must Have:
  • Develop and support Marvell's block-level and partition-level construction and signoff flows.
  • Perform synthesis, PnR, timing analysis, and backend checks on complex logic blocks.
  • Develop and implement timing and logic ECOs.
  • Interact with the RTL design team to drive design modifications to resolve congestion and timing issues.
  • Work with the global timing team in debugging/resolving any block-level timing issues seen at full chip.
  • Be a 3rd to 5th-semester student of Electrical Engineering or Computer Science.
  • Possess good communication skills and self-discipline to contribute in a team environment.
  • Be located in Yokneam.
Perks:
  • Competitive compensation and great benefits.
  • Workstyle within an environment of shared collaboration, transparency, and inclusivity.
  • Access to tools and resources for success, growth, and development.

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About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

The Backend Group is responsible for Physical Design and implementation of switching chips done in the Chip Design Group. Our job is to tape-out chips on time, while meeting the target speed, area, and power. The group has a high emphasis on quality, and is using cutting edge technologies on some of the largest, most complex chips in the industry

What You Can Expect

  • Develop and support Marvell's block-level and partition-level construction and signoff flows, incorporating industry standard EDA tools
  • Perform synthesis, PnR, timing analysis, and backend checks on complex logic blocks
  • Develop and implement timing and logic ECOs
  • Interact with the RTL design team to drive design modifications to resolve congestion and timing issues
  • Work with the global timing team in debugging/resolving any block-level timing issues seen at full chip

What We're Looking For

  • A 3rd to 5th-semester student of Electrical Engineering or Computer Science
  • Strong scripting skills in languages such as Perl, tcl, or Python - Advantage
  • Object-oriented programming skills are a plus
  • Good communication skills and self-discipline contribute in a team environment.
  • Location : Yokneam

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Interview Integrity

As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.

Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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