Qualcomm is currently seeking Pre-silicon functional verification Engineer for high efficiency power management (DC-DC charge pumps, bucks and linear regulators). Other IP blocks for power management include ADCs, 100W+ charging (Quick Charge 5.0), and Haptics, LED/AMOLED display drivers. List of work includes the following tasks:
- Take ownership of pre-silicon functional verification of subsystems and/or complete chips.
- Determine whether anomalous symptoms are caused by errors in the specifications, models, testbench, or design.
- Write verification plans.
- Extract modeling specifications from designers.
- Write and maintain behavioral models and testbenches in System Verilog and VerilogAMS.
- Hold verification with supporting results that demonstrate proper functional behavior
- Support integration of composite models into larger composite models maintained by other groups.
- Work with Analog and Digital design environments like Cadence Xcelium, Simvision/verisium debug, virtuoso.
- Work in a fast-paced environment with Analog, Digital design/DV, DFT engineers to ensure complete SoC verification
- Post silicon bring up support
Qualifications
MS+2 Years ASIC design, verification, or related work experience
Applicants should have sound verification experience with the following skills:
- Electrical circuit analysis
- Verilog, SystemVerilog, UVM, verilogAMS
- Perl or Python
- Knowledge of Phase locked loops, ADCs, DACs, Switching/Linear regulators and serial programming interfaces is preferred
- Writing behavioral models of analog blocks including event driven simulator
- Strong communication and organizational skills
- Strong process-oriented mindset.