PMIC AMS/Functional Verification Sr Engineer

1 Month ago • 2 Years + • Software Development & Engineering

Job Summary

Job Description

Qualcomm is seeking a Pre-silicon functional verification Engineer for high efficiency power management, including DC-DC charge pumps, bucks, and linear regulators. Responsibilities include taking ownership of pre-silicon functional verification of subsystems and/or complete chips, determining the root cause of anomalous symptoms, writing verification plans, and extracting modeling specifications from designers. The role involves writing and maintaining behavioral models and testbenches in System Verilog and VerilogAMS, conducting verification with supporting results, and supporting the integration of composite models. The engineer will work with Analog and Digital design environments like Cadence Xcelium, Simvision/verisium debug, and virtuoso, collaborating with Analog, Digital design/DV, and DFT engineers to ensure complete SoC verification and provide post-silicon bring-up support.
Must have:
  • MS+2 Years ASIC design/verification experience
  • Electrical circuit analysis
  • Verilog, SystemVerilog, UVM, VerilogAMS
  • Perl or Python
  • Strong communication skills
  • Strong process-oriented mindset
Good to have:
  • Knowledge of Phase locked loops, ADCs, DACs
  • Knowledge of Switching/Linear regulators
  • Knowledge of serial programming interfaces
  • Writing behavioral models of analog blocks
  • Event driven simulator

Job Details

Job Description

Qualcomm is currently seeking Pre-silicon functional verification Engineer for high efficiency power management (DC-DC charge pumps, bucks and linear regulators). Other IP blocks for power management include ADCs, 100W+ charging (Quick Charge 5.0), and Haptics, LED/AMOLED display drivers. List of work includes the following tasks:

  • Take ownership of pre-silicon functional verification of subsystems and/or complete chips.
  • Determine whether anomalous symptoms are caused by errors in the specifications, models, testbench, or design.
  • Write verification plans.
  • Extract modeling specifications from designers.
  • Write and maintain behavioral models and testbenches in System Verilog and VerilogAMS.
  • Hold verification with supporting results that demonstrate proper functional behavior
  • Support integration of composite models into larger composite models maintained by other groups.
  • Work with Analog and Digital design environments like Cadence Xcelium, Simvision/verisium debug, virtuoso.
  • Work in a fast-paced environment with Analog, Digital design/DV, DFT engineers to ensure complete SoC verification
  • Post silicon bring up support

Qualifications

MS+2 Years ASIC design, verification, or related work experience

Applicants should have sound verification experience with the following skills:

  • Electrical circuit analysis
  • Verilog, SystemVerilog, UVM, verilogAMS
  • Perl or Python
  • Knowledge of Phase locked loops, ADCs, DACs, Switching/Linear regulators and serial programming interfaces is preferred
  • Writing behavioral models of analog blocks including event driven simulator
  • Strong communication and organizational skills
  • Strong process-oriented mindset.

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About The Company

Our employees make Qualcomm’s success possible. We hire the brightest minds and foster a supportive, inclusive culture where your ideas have the power to contribute to world-changing innovations and breakthrough technologies. To make that possible, we leverage the breadth and depth of our diverse expertise from around the world to answer the unasked, conquer the complex, and solve some of the biggest challenges only we can – together.

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