Senior Engineer, Physical Design

Marvell's custom Processor/ASIC solution offers a differentiated approach with a best-in-class portfolio of data infrastructure intellectual property (IP). This role involves working on physical design and methodology for next-generation, high-performance processor chips in leading-edge CMOS process technology, targeting server, 5G/6G, automotive, and networking applications. You will collaborate with a global team on complex chip physical design and efficient design process methodology. Daily tasks include triaging workflows, running RTL code through synthesis and place and route tools, analyzing performance via timing analysis, and verifying power grids with EMIR analysis. Responsibilities also include reviewing completed runs for errors and optimizing successful runs.

Must Have

• Bachelor’s Degree in Electrical/Computer Engineering, Computer Science, or related fields and have 1-3 years of related professional experience OR a Master’s degree and/or PhD in Electrical/Computer Engineering, Computer Science, or related fields
• completed a digital logic course and projects that involved circuit design, testing, and timing analysis
• work or course experience where you created and tested a logic block, then were able to look at the quality of results to ID improvements
• Know formulas for timing analysis and concepts for synthesis and place and route

Perks & Benefits

• Competitive salary, plus 13th-month salary and performance-based bonus
• RSUs (Restricted Stock Units) for new joiners and on-going annually
• Premium health & accident insurance for you and your family (spouse and children)
• Annual medical check-up at a designated hospital arranged by Marvell
• Generous paid leave policies: 15 annual leave days, 3 Recharge periods per year (company-wide off-work from Friday to Monday), 5 paid sick leave days, 3 days of volunteer time-off and 11 public holidays
• Exciting Employee Events: Participate in fun activities throughout the year such as team birthdays, sports tournaments, company trips, mid-autumn, appreciation week, charity, health seminars, year-end party, and more

Your Team, Your Impact

Built on decades of expertise and execution, Marvell’s custom Processor/ASIC solution offers a differentiated approach with a best-in-class portfolio of data infrastructure intellectual property (IP) and a wide array of flexible business models. In this unique role, you’ll have the opportunity to work on both the physical design and methodology for future designs of our next-generation, high-performance processor chips in a leading-edge CMOS process technology, targeted at server, 5G/6G, automotive, and networking applications.

What You Can Expect

• You will work with a global team on both the physical design of complex chips as well as the methodology to enable an efficient and robust design process.
• Every day, you’ll be working hands-on to triage workflows, whether you’re running RTL code through synthesis and place and route (PnR) tools to create the physical view of the chip, analyzing performance by running timing analysis, verifying a robust power grid by performing EMIR analysis, etc.
• There are many sign-off checks that need to happen to verify that the database is ready to move on to the next level, and it’s your responsibility to review completed runs for errors or create optimizations from successful runs.

What We're Looking For

• Have completed a Bachelor’s Degree in Electrical/Computer Engineering, Computer Science, or related fields and have 1-3 years of related professional experience OR a Master’s degree and/or PhD in Electrical/Computer Engineering, Computer Science, or related fields. In your coursework, you must have completed a digital logic course and projects that involved circuit design, testing, and timing analysis.
• Have work or course experience where you created and tested a logic block, then were able to look at the quality of results to ID improvements.
• Know formulas for timing analysis and concepts for synthesis and place and route.
• Enjoy learning by doing the work and having access to guides and a mentor.
• Be willing to raise your hand and volunteer for learning opportunities you may not have experienced before.

Additional Compensation and Benefit Elements

• Competitive salary, plus 13th-month salary and performance-based bonus
• RSUs (Restricted Stock Units) for new joiners and on-going annually
• Premium health & accident insurance for you and your family (spouse and children)
• Annual medical check-up at a designated hospital arranged by Marvell
• Generous paid leave policies: 15 annual leave days, 3 Recharge periods per year (company-wide off-work from Friday to Monday), 5 paid sick leave days, 3 days of volunteer time-off and 11 public holidays
• Exciting Employee Events: Participate in fun activities throughout the year such as team birthdays, sports tournaments, company trips, mid-autumn, appreciation week, charity, health seminars, year-end party, and more.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Interview Integrity

As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.

Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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