Senior Engineer - SOC RTL Design

The Opportunity

We're looking for the Wavemakers of tomorrow.

Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology.

What You'll Do

• You will be responsible for pre-sales support, proposing architecture to customers based on their requirements.
• You will work with team to come up with architecture and micro-architecture and work with team to ensure delivery
• You will manage the design / RTL team to achieve the project goals.
• You will work with customer, provide technical support and provide collaterals agreed upon.
• You will work with team to achieve flow, methodology improvements to achieve high reuse.
• You will work with IP vendors to generate / get right configurations of the IP.
• You will manage teamwork allocation, schedule, risk mitigation and deliverables from design team.
• You will be reporting to Director - ASIC Design

What You'll Need:

• Education: Bachelor’s or master’s degree in electrical or Electronics and Communication or Computer Science Engineering.
• Experience: 6+ years of proven experience in Micro-architecture, SoC development, and full-chip design for multi-million gate SoCs.
• Micro Architecture Development: Ability to develop micro-architecture based on specifications.
• Bus Protocols & Peripherals: Strong knowledge of bus protocols such as AHB, AXI, and peripherals like PCIe, USB, Ethernet, etc.
• Memory Controllers & Microprocessors: Experience with memory controller designs and microprocessors is an advantage.
• Chip IO Design: Knowledge of chip IO design and packaging is beneficial.
• Test Plans & Verification: Proficient in reviewing high-level test plans and coverage metrics.
• Synthesis & Formal Verification: Expertise in Design Compiler Synthesis and formal verification using LEC.
• Timing Closure: Comprehensive understanding of timing closure is mandatory.
• Post-Silicon Debug: Experience in post-silicon bring-up and debugging.

"Hybrid work environment"

As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes:

• Competitive Compensation Package
• Restricted Stock Units (RSUs)
• Hybrid Working Model
• Provisions to pursue advanced education from Premium Institute, eLearning content providers
• Medical Insurance and a cohort of Wellness Benefits
• Educational Assistance
• Advance Loan Assistance
• Office lunch & Snacks Facility

Equal Employment Opportunity Statement

Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process.