SerDes Circuit Design Engineer

15 Minutes ago • 10 Years + • $181,100 PA - $318,400 PA
Network Engineering

Job Description

Join Apple's high-speed SerDes team as an Analog Mixed-Signal designer to build next-generation high-performance wireline transceivers for Apple's system-on-chip (SOC). You will work on state-of-the-art IPs, focusing on best-in-class designs for power, performance, and area. This role involves collaborating with cross-functional teams, driving block-level specifications, and ensuring IP quality, contributing to innovative products that enhance user experience.
Good To Have:
  • Knowledge of common high-speed SerDes protocols (e.g., PCIe, USB, DP, MPHY)
  • Skills in scripting and automation to enhance efficiency
Must Have:
  • Minimum 10 years relevant industry experience
  • Deep understanding of analog mixed-signal design with high-speed serial links
  • Experience designing analog mixed signal circuit blocks (Bandgap, LDO, amplifiers, comparators, ADCs, DACs, Oscillators, Filters)
  • Understanding of analog mixed-signal concepts (mismatch mitigation, linearity, stability, low-power/noise)
  • Experience with digitally assisted analog design concepts (calibrations, adaptive loops)
  • Proven track record driving IP requirements for high-speed IO (100+ Gbps NRZ/PAM)
  • Experience guiding junior engineers in high-speed IO circuit development
  • Experience with high-speed digital circuits and digital design concepts
  • Solid understanding of Tx/Rx equalization techniques and circuits
  • Experience with EQ adaptation methods and circuit implementations
  • Solid understanding of CDR architectures and implementations
  • Experience in Analog Mixed Signal circuit modeling and performance evaluation
  • Hands-on experience in lab testing, debug, and data analysis
  • Hands-on experience in advanced CMOS technologies, FinFet design
  • Hands-on experience with AMS IC development from definition to high-volume production
  • Knowledge of timing closure concepts and industry tools
  • Knowledge of IP delivery and quality checks
Perks:
  • Comprehensive medical and dental coverage
  • Retirement benefits
  • Range of discounted products and free services
  • Reimbursement for certain educational expenses (including tuition) for formal education related to advancing career at Apple
  • Eligibility for discretionary bonuses or commission payments
  • Relocation assistance

Add these skills to join the top 1% applicants for this job

cross-functional
data-analytics
game-texts
html
user-experience-ux
python
matlab

We are seeking talented Analog Mixed-Signal designers to join our high-speed SerDes team. Our team specializes in building next generation high-performance wireline transceivers delivering intellectual-property (IP) for Apple’s world-leading system-on-chip (SOC). In this role, you will actively work with cross-functional Analog Mixed-Signal design teams to create, execute and drivestate-of-the-art IPs key to Apple’s products. You will be challenged to make the best-in-class designs to surprise and delight Apple customers. With transforming the user experience in focus, you will get an opportunity to work on designs which makes the best systems. This enables you to learn end-to-end system while exceeding the highest expectations of quality, innovation and efficiency. If you have strong fundamentals and a track record of tackling technical challenges, If you are passionate about learning new skills and improving the value of your work, If you like to be tuned to the big picture while diving deeply into the details to innovate and tackle problems. We invite you to join and grow with your team!

You will work on the development of high-performance and high-speed AMS circuits used in SerDes PHY, including evaluation of different circuit topologies for specific product requirements (e.g., Rx, CDR, Tx, bias generator, high-speed clock generation and low-jitter distribution, phase interpolator, DLL, VCO, LDO) with best-in-class power, performance, and area (PPA). You will be leading discussions with cross-functional teams (e.g., architecture, SIPI, packaging, board design, DFT, ESD) to create and drive block-level specifications, mixed-signal implementations and behavioral modeling. You will closely work with SOC teams to deliver IP views and make sure they meet the quality standards. While developing these complex IPs, on regular basis you will interact with your peers/management to communicate progress, discuss new ideas and drive new implementations/concepts making it a rewarding and growth-oriented work environment.

  • BS and a minimum of 10 years relevant industry experience.
  • Deep understanding of analog mixed-signal design with experience in high-speed serial links.
  • Experience of designing analog mixed signal circuit blocks including Bandgap, biasing circuits, LDO regulators, amplifiers, comparators, switched-cap circuits, ADCs, DACs, Oscillators, Filters
  • Understanding of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power and low-noise techniques
  • Understanding and experience with digitally assisted analog design concepts (e.g. background calibrations, LMS based adaptive loops)
  • Proven track record of working with system and architecture teams to drive block-level and IP requirements for high-speed IO in 100+ Gbps NRZ and PAM applications
  • Proven track record of working with large teams and guiding junior engineers to develop circuit components required in TX, RX, PLL etc. of a high-speed IO.
  • Experience with high-speed digital circuits (e.g., serializer, deserializer, counters, dividers, etc.) with solid understanding of digital design concepts
  • Experience and solid understanding of Tx/Rx equalization techniques and circuits (e.g. CTLE, DFE, de-emphasis) for 100+ Gbps NRZ and PAM applications
  • Experience with EQ adaptation methods and circuit implementations to improve PPA
  • Solid understanding of CDR architectures and implementations
  • Experience in Analog Mixed Signal circuit modeling and performance evaluation (e.g. SystemVerilog, Matlab, Python, VerilogAMS)
  • Hands-on experience to drive lab testing, debug and data analysis
  • Hands-on experience in advanced CMOS technologies, design with FinFet technology
  • Hands-on experience with AMS IC development from definition to high-volume production including layout supervision, bench evaluation, correlation, and characterization
  • Concepts of timing closure and related industry tools (e.g., Nanotime, Primetime)
  • Concepts of IP delivery and quality checks
  • Knowledge of common high-speed SerDes protocols (e.g., PCIe, USB, DP, MPHY) is highly desired
  • Skills in scripting and automation to enhance efficiency are highly desirable

At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $181,100 and $318,400, and your base pay will depend on your skills, qualifications, experience, and location.

Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits.

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.

Set alerts for more jobs like SerDes Circuit Design Engineer
Set alerts for new jobs by Apple
Set alerts for new Network Engineering jobs in United States
Set alerts for new jobs in United States
Set alerts for Network Engineering (Remote) jobs

Contact Us
hello@outscal.com
Made in INDIA 💛💙