SoC Physical Design Engineer, Electrical Analysis
Apple
Job Summary
As a senior member of the SoC physical design team, you will be performing various electrical analyses at the block or chip level, including Gridcheck, ESD, Static/Dynamic IR, EM, Noise and Signal EM. You will collaborate with CAD/library/circuit technology/system teams for tech/flow evaluation, bring-up, validation, and qualification for SoC chip development. You will also work with the implementation team during the entire chip design cycle to drive EMIR test planning, analysis support, and sign-off closure for tape-out. You will manage schedules and support cross-functional engineering efforts for the success of Apple’s SoC product development.
Must Have
- Minimum BS and 10+ years of relevant industry experience.
- Knowledge of low-power circuit design, computer architecture, and/or digital systems.
Good to Have
- Experience with industrial EDA backend tools including Redhawk, PrimeRail, Voltus.
- Experience with ASIC or AMS physical implementation and analysis flow.
- Proficient in automating and debugging verification flows for digital VLSI design.
- Experience with Innovus, Design Compiler, PrimeTime and Tempus.
- Familiar with voltage drop budgeting, low-power design techniques, and sign-off criteria.
- Experience in multiple design tape-outs regarding power integrity signoff.
- Circuit design background and SPICE experience.
Job Description
- Minimum BS and 10+ years of relevant industry experience.
- Knowledge of low-power circuit design, computer architecture, and/or digital systems.
- Experience with industrial EDA backend tools including Redhawk, PrimeRail, Voltus.
- Experience with ASIC or AMS physical implementation and analysis flow for IP blocks as well as SoC fullchip.
- Proficient in automating and debugging verification flows for digital VLSI design.
- Experience with Innovus, Design Compiler, PrimeTime and Tempus.
- Familiar with voltage drop budgeting, low-power design techniques, and sign-off criteria for solid-state digital circuit systems.
- Experience in multiple design tape-outs regarding power integrity signoff.
- Circuit design background and SPICE experience.
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