SoC Physical Design Engineer, PnR

13 Minutes ago • All levels • $126,800 PA - $190,900 PA
Physics Engine

Job Description

Apple is seeking a passionate and dedicated SoC Physical Design Engineer to join their team. This role involves the physical implementation of design partitions from netlist to tapeout for complex SOCs using innovative process technology. The engineer will collaborate with architecture, CAD, timing, and logic design teams, impacting the delivery of best-in-class designs. Responsibilities include understanding partition architecture, completing netlist to GDS2 implementation, timing, physical and electrical verification, and resolving design and flow issues.
Good To Have:
  • Previous internship/co-op, project work or relevant coursework in computer architecture, VLSI, design, logic design, or circuit design.
  • Strong teamwork skills with the ability to collaborate with multiple functional teams across a variety of fields.
Must Have:
  • Working with the logic design team to understand partition architecture and drive physical aspects early in the design cycle.
  • Completing netlist to GDS2 implementation for partition(s) meeting schedule and design goals.
  • Timing, physical and electrical verification and driving the signoff closure for the partitions.
  • Resolve and improve design and flow issues related to physical design, identify potential solutions, and drive execution.
  • Minimum BS degree.
  • Basic understanding of logic gates.
Perks:
  • Opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs.
  • Eligible for discretionary restricted stock unit awards.
  • Can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan.
  • Comprehensive medical and dental coverage.
  • Retirement benefits.
  • A range of discounted products and free services.
  • Reimbursement for certain educational expenses — including tuition for formal education related to advancing your career at Apple.
  • Might be eligible for discretionary bonuses or commission payments.
  • Might be eligible for relocation.

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Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hardworking people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product! In this visible role, you will be directly responsible for the physical implementation of design partition(s) (from netlist to tapeout) for a highly complex SOC utilizing innovative process technology.

In Physical Design, you will be at the center of design effort collaborating with architecture, CAD, timing and logic design teams, with a critical impact on delivering best in class designs and knowledge of basic chip architecture, back end chip design flow, physical synthesis, floor-planning, place and route (PnR), power grid, timing (STA), physical design verification (DRC/LVS), EMIR (Redhawk/Totem/Voltus). Responsibilities would include:

  • Working with the logic design team to understand partition architecture and drive physical aspects early in the design cycle.
  • Completing netlist to GDS2 implementation for partition(s) meeting schedule and design goals.
  • Timing, physical and electrical verification and driving the signoff closure for the partitions.
  • Resolve and improve design and flow issues related to physical design, identify potential solutions, and drive execution.
  • Minimum BS.
  • Basic understanding of logic gates.
  • Previous internship/co-op, project work or relevant coursework in computer architecture, VLSI, design, logic design, or circuit design.
  • Strong teamwork skills with the ability to collaborate with multiple functional teams across a variety of fields.
  • Experience with Verilog, VHDL, Python, Perl, TCL and/or SPICE.

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