Sr. Director, Silicon Design

25 Minutes ago • 15 Years + • $236,010 PA - $333,190 PA

Job Summary

Job Description

We are seeking a senior technology leader with expertise in advanced process nodes (sub 3nm) and successful RTL to GDS flows for foundry tape-outs. This role involves performing physical design implementation of custom IP and SoC designs, covering synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power/noise analysis. Responsibilities include verification, signoff, optimizing designs for power, frequency, and area, and developing physical design methodologies.
Must have:
  • Perform physical design implementation of custom IP and SoC designs from RTL to GDS
  • Conduct all aspects of physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis
  • Conduct verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking
  • Analyze results and make recommendations to fix violations for current and future product architecture
  • Optimize design to improve product level parameters such as power, frequency, and area
  • Participate in the development and improvement of physical design methodologies and flow automation
  • Take a design (block, subsystem or SoC) RTL through full scope of physical design for tape-out
  • Work with front end design team to tweak RTL or design to improve PPA
  • Work with DFT team to arrive at appropriate test plan
  • Understand how the SoC will be assembled in the package to drive top level & block level floorplan
  • Hands on experience with industry standard EDA tools (construction & signoff)
  • Strong technical experience in designing complex SoC, CPU & GPU cores using advanced process nodes
  • Ability to understand fabless customer requirements and synthesize them to offerings
  • Experience in successfully managing customer engagement
  • Experience managing and mentoring an engineering team
  • Bachelor’s degree in electrical engineering or applied sciences
  • 15+ years of demonstrated organizational and technical leadership
Good to have:
  • Experience with backside metal
Perks:
  • Competitive pay
  • Stock
  • Bonuses
  • Health benefits
  • Retirement benefits
  • Vacation

Job Details

Job Description:

About the Role:

We are looking for a senior technology leader who is familiar with advanced process nodes (sub 3nm) and have successfully exercised RTL to GDS flows to tape-out (tape-in) to the foundry.

The Senior Director of Silicon Design performs physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing. Conducts all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis. Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking. Analyzes results and makes recommendations to fix violations for current and future product architecture. Possesses expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, placing, routing, synthesis, and DFT using industry standard EDA tools. Optimizes design to improve product level parameters such as power, frequency, and area. Participates in the development and improvement of physical design methodologies and flow automation.

Responsibilities

  • Ability to take a design (block, subsystem or SoC) RTL through full scope of physical design (synthesis, floorplan, p&r and signoff) for tape-out (tape-in)
  • Need to work with front end design team to tweak RTL or design to improve the PPA
  • Should be able to work with DFT team to arrive at appropriate test plan
  • Will need to understand how the SoC will be assembled in the package that will drive the top level & block level floorplan

Required Background and Experience:

  • Hands on experience with industry standard EDA tools both construction & signoff
  • Strong technical experience in designing complex SoC, CPU & GPU cores using advanced process nodes
  • Ability to understand fabless customer requirements including end market applications and synthesize them to our offerings to derive an acceptable solution
  • Experience in successfully managing customer engagement
  • Experience managing and mentoring an engineering team.
  • Experience with backside metal preferred

Qualifications:

  • Bachelor’s degree in electrical engineering or applied sciences.
  • 15+ years of demonstrated organizational and technical leadership with a proven track record of working well in a matrixed organization

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Business group:

Intel makes possible the most amazing experiences of the future. You may know us for our processors. But we do so much more. Intel invents at the boundaries of technology to make amazing experiences possible for business and society, and for every person on Earth. Harnessing the capability of the cloud, the ubiquity of the Internet of Things, the latest advances in memory and programmable solutions, and the promise of always-on 5G connectivity, Intel is disrupting industries and solving global challenges. Leading on policy, diversity, inclusion, education and sustainability, we create value for our stockholders, customers, and society.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.

Benefits:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

https://intel.wd1.myworkdayjobs.com/External/page/1025c144664a100150b4b1665c750003

Annual Salary Range for jobs which could be performed in the US:

$236,010.00-$333,190.00

Salary range dependent on a number of factors including location and experience.

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

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