CPU Design Verification Engineer

23 Minutes ago • All levels
Quality Assurance

Job Description

This role involves pre-silicon functional verification of CPU logic to ensure design meets specifications. The engineer will develop IP verification plans, test benches, and environments, execute plans, and debug issues. Responsibilities include collaborating with architects/RTL developers to improve verification of complex features and maintaining existing infrastructure. The ideal candidate will have a Bachelor's or Master's degree in Electrical, Electronics, or Computer Engineering.
Must Have:
  • Perform Pre-Silicon functional verification of CPU logic
  • Develop IP verification plans, test benches, and the verification environment
  • Execute verification plans and define and run system simulation models
  • Replicate, root cause, and debug issues in the Pre-silicon environment
  • Collaborate with CPU architects/RTL developers
  • Document test plans and drive technical reviews
  • Maintain and improve existing functional verification infrastructure and methodology
  • Bachelor's or Master's degree in Electrical or Electronics Engineering, Computer Engineering, or any related field
  • Good knowledge in CPU architecture and Computer System
  • Experience with System Verilog and UVM
  • Experience with scripting (i.e PERL, Phyton)
  • Familiar with verification tools and methodologies

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Job Details:

Job Description:

  • Performs Pre-Silicon functional verification of CPU logic to ensure design will meet specification requirements.
  • Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to CPU microarchitecture specifications.
  • Executes verification plans and defines and runs system simulation models to verify the design and uncover bugs.
  • Replicates, root causes, and debugs issues in the Pre-silicon environment.
  • Finds and implements corrective measures to resolve failing tests.
  • Collaborates with CPU architects/RTL developers to improve verification of complex architectural and microarchitectural features and to meet functional, performance, and power goals.
  • Documents test plans and drives technical reviews of plans and proofs with design and architecture teams.
  • Maintains and improves existing functional verification infrastructure and methodology.

Qualifications:

  • Bachelor's or Master's degree in Electrical or Electronics Engineering, Computer Engineering, or any related field.
  • Good knowledge in CPU architecture and Computer System.
  • Experience with System Verilog and UVM.
  • Experience with scripting (i.e PERL, Phyton).
  • Familiar with verification tools and methodologies.
  • Excellent problem-solving and debugging skills.
  • Effective communication and collaboration abilities.
  • Self-motivated and able to work effectively in a dynamic, fast-paced environment.

Job Type:

Experienced Hire

Shift:

Shift 1 (Malaysia)

Primary Location:

Malaysia, Penang

Additional Locations:

Business group:

The Silicon Engineering Group (SIG) is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs from architecture to manufacturing readiness that power Intel’s leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

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