Student Intern - Analog Layout Design

About Celestial AI

As Generative AI continues to advance, the performance drivers for data center infrastructure are shifting from systems-on-chip (SOCs) to systems of chips. In the era of Accelerated Computing, data center bottlenecks are no longer limited to compute performance, but rather the system’s interconnect bandwidth, memory bandwidth, and memory capacity. Celestial AI’s Photonic Fabric™ is the next-generation interconnect technology that delivers a tenfold increase in performance and energy efficiency compared to competing solutions.

The Photonic Fabric™ is available to our customers in multiple technology offerings, including optical interface chiplets, optical interposers, and Optical Multi-chip Interconnect Bridges (OMIB). This allows customers to easily incorporate high bandwidth, low power, and low latency optical interfaces into their AI accelerators and GPUs. The technology is fully compatible with both protocol and physical layers, including standard 2.5D packaging processes. This seamless integration enables XPUs to utilize optical interconnects for both compute-to-compute and compute-to-memory fabrics, achieving bandwidths in the tens of terabits per second with nanosecond latencies.

This innovation empowers hyperscalers to enhance the efficiency and cost-effectiveness of AI processing by optimizing the XPUs required for training and inference, while significantly reducing the TCO2 impact. To bolster customer collaborations, Celestial AI is developing a Photonic Fabric ecosystem consisting of tier-1 partnerships that include custom silicon/ASIC design, system integrators, HBM memory, assembly, and packaging suppliers.

ABOUT THE ROLE

We are building next-generation 50G/100G optical link solutions for data-centric computing, leveraging advanced silicon photonics integrated with cutting-edge CMOS electronics. We are looking for an Analog Layout Design Student Intern to implement physical design for high-speed analog and mixed-signal circuits for our photonic transceivers and Electronic Integrated Circuits (EICs).

As a Co-op student, you will work closely within our Analog and Mixed Signal (AMS) team to develop the physical design skills needed to deliver scalable, low-power, high-performance EICs in leading edge technology processes for optical compute and interconnects.

ESSENTIAL DUTIES AND RESPONSIBILITIES

• Design high-speed analog and mixed-signal layouts in advanced CMOS technology processes.
• Transistor level floor planning, routing, and verifying against design rules (DRC) and schematic connectivity (LVS).
• Work closely with Analog Circuit Design engineers to optimize layouts to meet performance requirements.
• Develop custom scripts to improve tools, flows, and methodologies used in the team’s design environment.

QUALIFICATIONS

• Enrolled in a Bachelor’s degree program in Computer Engineering, Electrical Engineering, Engineering Science, or related fields.
• A solid foundation in CMOS digital electronics.
• A solid foundation in analog electronics is a plus.
• Python and Perl programming experience a plus.
• Excellent communications skills (written and oral).
• Proactive and willing to learn quickly.

This paid student internship, which will be 12-16 months in duration, offers a target base salary of approximately $80,000.00 - $85,000.00 CAD. The final base salary will be determined based on the candidate’s experience and skills as demonstrated during the interview process. As a student intern, you will not be eligible for company-sponsored benefits such as health and dental coverage, life insurance, stock options, or retirement plans.

We offer great benefits (health, vision, dental and life insurance), collaborative and continuous learning work environment, where you will get a chance to work with smart and dedicated people engaged in developing the next generation architecture for high performance computing.

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