VLSI CAD Engineer
3 Months ago • All levels
Software Development & Engineering
Job Description
As a VLSI CAD Engineer at Apple in Austin, Texas, you will design and manufacture next-generation, high-performance, power-efficient processors and systems-on-chip (SoC). You will script in TCL or Perl, managing trade-offs in product success metrics, particularly for on-device Machine Learning constraints. This role involves debugging Mixed Signal QA flows and Physical Design (PD) flows, utilizing expertise in floor planning, placement, optimization, clocking, and routing. You will develop innovative solutions for physical design and optimization, collaborating with cross-functional teams to address key physical design challenges. Additionally, you will develop methodologies for low-power designs, working with tools like Physical Design Verification, RC extraction, IR, and Static Timing Analysis (STA). Your responsibilities include developing flows for innovative technologies with industry-standard Placement and Routing tools, supporting implementation flows, and creating flows for improved Power, Performance, and Area (PPA) and productivity, including Machine Learning based solutions. You will also work with tool vendors to resolve tool/flow issues and develop/maintain custom CAD tools for implementation and signoff within CAD Place and Route flows. This is a full-time position requiring 40 hours per week.
Good To Have:
- Work with cross-functional teams
- Work with other tools like Physical Design Verification, RC extractions, IR and Static Timing analysis (STA)
- Work with Placement and Routing tools from industry vendors
- Machine Learning based solutions
Must Have:
- Scripting in TCL or Perl
- Debugging Mixed Signal QA flows
- Knowledge of floor planning
- Knowledge of placement
- Knowledge of optimization
- Knowledge of clocking
- Knowledge of routing
- Develop low power design methodology
- Develop custom CAD tools
Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn’t have imagined, and now, can’t imagine living without. It’s the diversity of those people and their ideas that inspires the innovation that runs through everything we do.
APPLE INC has the following available in Austin, Texas. Design and manufacture next-generation, high-performance, power-efficient processor, system-on-chip (SoC) Close partitions through silicon TO. Script in TCL or Perl while assisting with trade-offs between product success metrics, in particular under constraints of on-device Machine Learning. Debug Mixed Signal QA flows in addition to PD flows using knowledge in areas such as floor planning, placement, optimization, clocking, and routing. Develop innovative solutions in physical design and optimization space while working with cross-functional teams to solve key physical design challenges. Develop methodology for low power designs while collaborating with other tools like Physical Design Verification, RC extractions, IR and Static Timing analysis (STA). Develop flows for innovative technologies while working with Placement and Routing tools such from industry vendors. Support implementation flows. Develop flows for better PPA and productivity including Machine Learning based solutions while working with tool vendors to resolve tool/flow issues. Develop and maintaining custom CAD tools for implementation and signoff while working in CAD Place and Route flows. 40 hours/week.
APPLE INC has the following available in Austin, Texas. Design and manufacture next-generation, high-performance, power-efficient processor, system-on-chip (SoC) Close partitions through silicon TO. Script in TCL or Perl while assisting with trade-offs between product success metrics, in particular under constraints of on-device Machine Learning. Debug Mixed Signal QA flows in addition to PD flows using knowledge in areas such as floor planning, placement, optimization, clocking, and routing. Develop innovative solutions in physical design and optimization space while working with cross-functional teams to solve key physical design challenges. Develop methodology for low power designs while collaborating with other tools like Physical Design Verification, RC extractions, IR and Static Timing analysis (STA). Develop flows for innovative technologies while working with Placement and Routing tools such from industry vendors. Support implementation flows. Develop flows for better PPA and productivity including Machine Learning based solutions while working with tool vendors to resolve tool/flow issues. Develop and maintaining custom CAD tools for implementation and signoff while working in CAD Place and Route flows. 40 hours/week.
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