ASIC Design Efficiency Engineer - New College Grad 2025

6 Months ago • All levels • $96,000 PA - $184,000 PA
Research Development

Job Description

NVIDIA seeks a highly skilled ASIC Design Efficiency Engineer (New College Grad 2025) to develop innovative hardware, GPU, and system designs. Responsibilities include improving performance, power, and area (PPA) through methodology development and infrastructure improvements. The role involves collaborating with architects, designers, and verification teams to deliver high-performance, area-efficient RTL. Experience with pipeline processors or deep learning accelerators is a plus. The successful candidate will contribute to the creation of industry-leading GPUs across various product lines, including consumer graphics, self-driving cars, and AI.
Good To Have:
  • Pipeline processor or deep learning accelerator experience
  • Low power or physical (synthesis/VLSI) design experience
  • Python/Perl scripting knowledge
Must Have:
  • Bachelors/Masters in EE/CE
  • SystemVerilog or similar HDL proficiency
  • Solid understanding of logic design and computer architecture
  • Strong interpersonal and teamwork skills
  • RTL design and verification
Perks:
  • Equity
  • Benefits

Add these skills to join the top 1% applicants for this job

deep-learning
python
perl
communication

We are now looking for an ASIC Design Efficiency Engineer. NVIDIA is seeking extraordinary methodology engineers to design hardware accelerators and processors on our next-generation mobile, embedded and datacenter platforms. This position offers the opportunity to have real impact in a multifaceted, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. Join our dynamic team today!

What you'll be doing:

  • Develop innovative HW, GPU and system designs to extend the state of the art performance and efficiency.

  • Understand the design and implementation, develop methodology and infrastructure to drive Performance, Power and Area (PPA) improvements.

  • Execute and deliver fully verified, high performance, area and power efficient RTL to achieve design targets.

  • Collaborate with architects, designers, verification and VLSI teams to craft the industries' top performing GPUs.

What we need to see:

  • Pursuing Bachelors or Masters Degree in EE or CE (or equivalent experience).

  • Proficiency in SystemVerilog or similar HDL.

  • You have a solid understanding of logic design and computer architecture.

  • Strong interpersonal skills are required along with the ability to work in a diverse product oriented team.

Ways to stand out from the crowd:

  • Pipeline processor or deep learning accelerator design/architecture experience

  • Low power or physical (synthesis/VLSI) design experience

  • Scripting knowledge in Python/Perl

NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you're creative and autonomous, we want to hear from you!

The base salary range is 96,000 USD - 184,000 USD. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.

You will also be eligible for equity and benefits. NVIDIA accepts applications on an ongoing basis.

NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

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