The GNSS Design Verification Engineer will build block/subsystem/chip level testbenches using advanced DV methodologies. This role involves creating verification plans based on specifications, collaborating with designers and systems engineers for review. The engineer will architect testbenches for maximum reusability, utilizing UVM libraries. Responsibilities also include generating directed and constrained random tests, debugging failures, managing bug tracking, and ensuring thorough coverage. The role requires creating and analyzing block/subsystem level coverage models and adding test cases to improve coverage, along with low-power and formal verification. The engineer will also be responsible for improving DV flow and methodologies.