Sr. Principal Design Engineer

4 Months ago • 7 Years +
Software Development & Engineering

Job Description

As a Verification Engineer for the Memory Controller development team at Cadence, you will lead the verification efforts and contribute to the functional verification of the Memory Controller IP. This role involves integrating new features into the existing verification environment, ensuring clean customer configurations during verification regressions, supporting customers with any issues, and focusing on functional and code coverage. The engineer will also ensure the design aligns with the team's technical and quality metrics.
Good To Have:
  • Memory controller verification experience is desirable
Must Have:
  • BS/MS in Electrical/Computer Engineering
  • At least 7 years of relevant experience including design verification experience
  • Strong background in functional verification fundamentals, environment planning, and test plan generation
  • UVM based functional verification environment development is required
  • AXI and/or CHI-E experience is highly desirable

Add these skills to join the top 1% applicants for this job

test-coverage

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

As a Verification Engineer for Memory Controller development team, you will lead the verification effort and contribute to the functional verification of the Cadence's Memory Controller IP. This person will work with the existing functional verification environment to add new features into the verification environment, ensuring various customer configurations are clean as part of verification regressions, supporting customers in case of any issues with using the verification environment, and functional and code coverage. Additionally, this person will be responsible for ensuring that the design is in line with the technical and quality requirements set for the team – particularly with respect to our quality Metrics.

The position is based in Austin.

Position Requirements:

  • BS/MS - Electrical / Computer Engineering
  • At least 7 years of relevant experience including design verification experience.
  • Strong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must.
  • UVM based functional verification environment development is required.
  • AXI and/or CHI-E experience is highly desirable.

Memory controller verification experience is desirable.

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