Staff Analog Layout Engineer

Your Team, Your Impact

As an Analog Layout Staff Engineer with Marvell, you’ll be a member of the Central Engineering business group. If you picture Marvell as a wheel, Central Engineering is the center hub providing IP to be used by all the other spokes on that wheel, including Automotive, Storage, Security, and Networking. You’ll be part of a small analog team making a big impact on this organization. Additionally, Marvell has the perfect size and scale for you to learn several aspects of engineering that will be new to you, but also have the time and freedom to dive deep into the details of your specialization on most projects.

What You Can Expect

• Independently develop complex analog mixed-signal, and custom layouts using industry-standard tools (Cadence Virtuoso, Mentor, etc.) across deep sub-micron, FinFET, and emerging GAA technologies.
• Mentor junior layout engineers, review their work, and provide guidance on best practices, layout optimization, and design rule compliance.
• Collaborate closely with circuit design engineers to understand schematic intent and translate it into efficient, high-performance layouts.
• Drive full Physical Verifications closure by analyzing and resolving DRC, LVS, ERC, ANT violations.
• Perform EMIR simulations, identify IR drop and electromigration issues, and implement layout fixes to meet reliability targets.
• Lead layout reviews and contribute to internal knowledge-sharing and process enhancement initiatives.
• Take ownership of layout blocks from planning through tape-out, ensuring quality, schedule adherence, and alignment with project goals.
• Stay updated with evolving process technologies, EDA tools, and layout methodologies. Develop and maintain automation scripts (Perl, Tcl, SKILL) to streamline layout tasks, improve productivity, and ensure consistency across projects.

What We're Looking For

• Education: BE/B.Tech or MS/M.Tech in E&C, EEE from the reputed institution.
• Minimum of 6-10 years of experience in High-Speed Analog/Custom layout development.
• Have fundamental understanding of electrical concepts, likely acquired through a degree in Electrical Engineering (graduate or undergraduate).
• Know how to use CAD tools to do the implementation layers, microelectronic layers in design that go beyond the schematics.
• Track record of delivering high-speed or precision analog circuits, preferably in multiple process nodes.
• Very Good understanding of the local layout effects in the lower technologies.
• Expertise in critical layout design techniques such as Matching, Signal flow, Clock Routing, Shielding, Resistance and capacitance reduction, Bias, and Power routing.
• Understanding of EMIR, Latch-up, ESD strategy, power planning.
• Have ownership through the full development cycle: floorplan, layout, verification, delivery, and support.
• Assume more responsibility and ownership of tasks, from cells to functional blocks, to higher-level macros, to full interfaces or chips.
• Have excellent communication skills to give status updates to your team, present to global teams in different time zones, and to share information with many different levels of personnel at Marvell.

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.