Deep Learning Systems Architect

3 Months ago • 5 Years +

System Design

Job Description

The candidate will be responsible for understanding Deep Learning workload characteristics, measuring, analyzing, and projecting the power and performance of the latest DL workloads. This role requires a background in both software and hardware to perform sensitivity analysis for hardware knobs and improve the performance of DL workloads. Experience with simulators, benchmarking DL models, and programming in Python/C++/CUDA/HIP/OpenCL is necessary. The ideal candidate will have experience working on performance analysis of DL workloads running on accelerators and improving them, with a solid understanding of computer architecture fundamentals.

Good To Have:

Knowledge of performance and power modeling

Must Have:

Understand DL workload characteristics
Measure and analyze DL workload power/performance
Software and hardware background
Simulators and benchmarking DL models experience
Python/C++/CUDA/HIP/OpenCL programming
Performance analysis of DL workloads on accelerators
Computer architecture and memory hierarchy knowledge
Problem-solving, communication, and organization skills
Ability to work in a team and meet deadlines

Add these skills to join the top 1% applicants for this job

problem-solving

performance-analysis

cpp

cuda

opencl

deep-learning

python

In this role, the candidate will be required to understand Deep learning workload characteristics and have the hands-on ability to measure, analyze and use the data to project and estimate the power and performance of the latest DL workloads.

Responsibilities

The ideal candidate will have both software and hardware background to do sensitivity analysis for both hardware knobs and understand how to measure and improve the performance of DL workloads.
The candidate should have worked on simulators and have experience with benchmarking DL models.
The ideal candidate should have at least 5+ years of experience working on performance analysis of DL workloads running workloads on accelerators and improving them.
Programming and debugging code written in python/C++/CUDA/HIP/OpenCL will be required as well as ability to model and work with the hardware teams to measure power and performance of key kernels running on RTL and performance simulators
Knowledge of performance and power modeling is a plus.
Solid understanding of the fundamentals of computer architecture, memory hierarchy, caches and fabrics is a prerequisite for the role.

Requirements

Excellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated.
Ability to work well in a team and be productive under aggressive schedules

Education and Experience

PhD, Master’s Degree in Computer Engineering / Computer science with 5+ years of experience working on DL models.
Coursework on computer architecture, parallel computing , compilers and digital design is required.

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