Design Verification Engineer
Job Description
- BS/MS/PhD in Electrical/Computer Engineering or related field.
- Proficiency in SystemVerilog, UVM, and scripting languages.
- Understanding of ASIC design flow and digital verification methodologies.
- Experience with industry-standard EDA tools.
- Strong mathematical skills.
- Experience with Digital Signal Processing and DSP modeling in C/C++.
- Competitive salary, plus 13th-month salary and performance-based bonus
- RSUs (Restricted Stock Units) for new joiners and on-going annually
- Premium health & accident insurance for you and your family
- Annual medical check-up
- 15 annual leave days, 3 Recharge periods per year, 5 paid sick leave days, 3 days of volunteer time-off and 11 public holidays
- Exciting Employee Events
About Marvell
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
Custom Silicon Engineering Team developed custom SoC design for cloud data center with innovative storage technologies, including ultra‐fast read channels, high‐performance processors, leading edge transceivers, highly efficient analog designs, and powerful cryptographic engines. These solutions address all segments of the hard disk drive (HDD) and solid‐state drive (SSD) electronics markets.What You Can Expect
• Develop and implement verification plans for read channel storage IP designs.
• Create and maintain testbenches using industry-standard verification tools and methodologies.
• Perform functional and performance verification of complex digital designs.
• Collaborate with design and architecture teams to identify and resolve design issues.
• Analyze and debug simulation failures and provide detailed reports on verification results.
• Mentor and guide junior verification engineers.
What We're Looking For
• BS/MS/PhD Degree in Electrical Engineering / Computer Engineering / Electronics and Telecommunications Engineering, or a related field.
• Proficiency in verification languages such as SystemVerilog, UVM, and scripting languages (Python, Perl, etc.).
• Understanding of ASIC design flow, strong understanding of digital design and verification methodologies.
• Experience with industry-standard EDA tools (e.g., Cadence, Synopsys, Mentor Graphics).
• Strong mathematical skills.
• Experience with Digital Signal Processing (DSP) and knowledge of DSP modeling in C/C++.
• Strong problem-solving skills.
• Fluent in English language, excellent communication skills,
Additional Compensation and Benefit Elements
Competitive salary, plus 13th-month salary and performance-based bonus
RSUs (Restricted Stock Units) for new joiners and on-going annually
Premium health & accident insurance for you and your family (spouse and children)
Annual medical check-up at a designated hospital arranged by Marvell
Generous paid leave policies: 15 annual leave days, 3 Recharge periods per year (company-wide off-work from Friday to Monday), 5 paid sick leave days, 3 days of volunteer time-off and 11 public holidays
Exciting Employee Events: Participate in fun activities throughout the year such as team birthdays, sports tournaments, company trips, mid-autumn, appreciation week, charity, health seminars, year-end party, and more.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
#LI-UN1
