Design Verification Engineer - Principal

2 Months ago • All levels

Software Development & Engineering

Job Description

Marvell is seeking a Principal Design Verification Engineer to join their team. The role involves verifying circuitry for innovative storage technologies, including read channels, high-performance processors, transceivers, analog designs, and cryptographic engines. Responsibilities include developing and implementing verification plans, creating testbenches using industry-standard tools and methodologies, performing functional and performance verification of complex digital designs, collaborating with design and architecture teams to resolve issues, and analyzing simulation failures. The engineer will also mentor junior team members. The position requires proficiency in verification languages like SystemVerilog and UVM, scripting languages, understanding of ASIC design flow, and experience with EDA tools. Knowledge of Digital Signal Processing (DSP) and its modeling in C/C++ is also required, with a preference for experience in high-speed DSP design verification.

Good To Have:

Knowledge of DSP modeling in C/C++
Experience with high-speed DSP design verification

Must Have:

Proficiency in SystemVerilog, UVM, and scripting languages
Understanding of ASIC design flow and verification methodologies
Experience with industry-standard EDA tools
Strong mathematical and problem-solving skills
Experience with Digital Signal Processing (DSP)

Perks:

Competitive salary, 13th-month salary, performance-based bonus
Restricted Stock Units (RSUs)
Premium health & accident insurance for family
Annual medical check-up
Generous paid leave (15 annual days, 3 Recharge periods, 5 sick days)
Paid volunteer time-off
11 public holidays
Employee events (birthdays, sports, trips, parties)

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About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

As part of the Design Verification Team at Marvell, you will verify all of the circuitry that goes inside our chips for innovative storage technologies, including ultra‐fast read channels, high‐performance processors, leading edge transceivers, highly efficient analog designs, and powerful cryptographic engines. These solutions address all segments of the hard disk drive (HDD) and solid‐state drive (SSD) electronics markets. Many of the same technologies have been utilized in Marvell storage system solutions products, powering PCs, servers, cloud, and enterprise systems.

What You Can Expect

•   Develop and implement verification plans for read channel storage IP designs.
•   Create and maintain testbenches using industry-standard verification tools and methodologies.
•   Perform functional and performance verification of complex digital designs.
•   Collaborate with design and architecture teams to identify and resolve design issues.
•   Analyze and debug simulation failures and provide detailed reports on verification results.
•   Mentor and guide junior verification engineers.

What We're Looking For

•   BS/MS/PhD Degree in Electrical Engineering / Computer Engineering / Electronics and Telecommunications Engineering, or a related field.
•   Proficiency in verification languages such as SystemVerilog, UVM, and scripting languages (Python, Perl, etc.).
•   Understanding of ASIC design flow, strong understanding of digital design and verification methodologies.
•   Experience with industry-standard EDA tools (e.g., Cadence, Synopsys, Mentor Graphics).
•   Strong mathematical skills.
•   Experience with Digital Signal Processing (DSP) and knowledge of DSP modeling in C/C++.
•   Strong problem-solving skills.
•   Fluent in English language, excellent communication skills,
•   Preferred Qualifications: Experience with high-speed DSP design verification.

Additional Compensation and Benefit Elements

Competitive salary, plus 13th-month salary and performance-based bonus
RSUs (Restricted Stock Units) for new joiners and on-going annually
Premium health & accident insurance for you and your family (spouse and children)
Annual medical check-up at a designated hospital arranged by Marvell
Generous paid leave policies: 15 annual leave days, 3 Recharge periods per year (company-wide off-work from Friday to Monday), 5 paid sick leave days, 3 days of volunteer time-off and 11 public holidays
Exciting Employee Events: Participate in fun activities throughout the year such as team birthdays, sports tournaments, company trips, mid-autumn, appreciation week, charity, health seminars, year-end party, and more.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

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