IP Memory Design Engineer, Up to Staff

Job Description

Job Posting Date

2025-10-17

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As an ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Engineers collaborate with cross-functional groups to determine product execution path.

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.

OR

• Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.

OR

• PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

This position involves designing and implementing Low-power, High Performance, area-efficient embedded memory (CPUL1/L2, SRAM, register files, etc.) circuits and architectures.

Position will be located in APAC-TW metropolitan region.

Responsibilities

• Develop memory architectures and circuit implementation techniques.
• Schematic entry, simulation of major blocks, layout planning, layout supervision and interface with CAD team for full verification and model generation.

Qualifications in the following areas are required

• 3+ years of academic or professional experience designing embedded memories for SoC applications
• Strong Technical expertise in CPUL1/L2, Compiler SRAM/Register File architectures and advanced custom circuit implementations.
• Full embedded memory design flow: Architecture, circuit design, physical implementation, compiler automation, characterization, timing and model generation
• Physical implementation (layout) and layout supervision
• Advanced technology nodes

Preferred qualifications in the following areas are a plus

• Experience with tight pitch-matched memory layout designs
• Understanding of physical implementation impact on circuit performance
• Familiarity with variation-aware design in nano-meter technology nodes
• Experience with low power design features and flows

Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

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