Physical Design (Backend) Technical Leader

8 Minutes ago • 10 Years +

Backend Development

Job Description

We are seeking a highly experienced Senior Physical Design Technical Lead to drive backend implementation of advanced Intel wireless products. This role involves defining and improving design implementation flows, automation, and signoff methodologies. You will technically lead physical design for complex VLSI chips, ensuring high performance and reliability. Responsibilities include optimizing power, performance, and area (PPA) metrics, resolving design issues (Place and Route, timing, power, signal integrity), and collaborating with other Intel design teams. You will also mentor junior engineers and stay updated with industry advancements.

Good To Have:

Proficiency in Cadence EDA tools

Must Have:

Lead and drive backend implementation of advanced Intel wireless products.
Define and improve design implementation flows, automation, and signoff methodologies.
Technically lead physical design for complex VLSI chips.
Optimize power, performance, and area (PPA) metrics.
Analyze and resolve design issues related to Place and Route, timing, power, signal integrity, and manufacturability.
Collaborate with other Intel design teams for seamless integration.
10+ years of hands-on experience in VLSI physical design with advanced technology nodes.
Excellent familiarity with Physical Design implementation flows and techniques.
Proficiency in Synopsys EDA tools.
Knowledge of scripting languages such as Python, Perl, or TCL.
Strong understanding of STA, IR drop, EM analysis, DRC/LVS, and ECO flows.
Experience with power, performance, and area (PPA) optimization.

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Job Description:

We are seeking for a highly experienced and motivated Senior Physical Design Technical Lead to join our group and lead and drive backend implementation of advanced Intel wireless products. As part of your job you will define and improve design implementation flows, automation and signoff methodologies. Technically Lead the physical design flow and implementation activities for complex VLSI chips, ensuring high performance and reliability. Optimize power, performance, and area (PPA) metrics through advanced techniques and tools. Analyze and resolve design issues related to Place and Route, timing, power, signal integrity, and manufacturability. Collaborate with other Intel design teams to ensure seamless integration and optimization of design specifications. Mentor and guide junior engineers, providing technical expertise and support. Interface with EDA vendors to evaluate and integrate new tools and technologies and stay updated with the latest industry trends and advancements in VLSI Physical design.

Qualifications:

BSc/MSc in electrical or computer engineering.
10+ years of hands-on experience in VLSI physical design, with a proven track record of successful projects working with advanced technology nodes.
Excellent familiarity with all Physical Design implementation flows and techniques, including floorplanning, placement, routing, and timing closure.
Proficiency in Synopsys EDA tools (Cadence is an advantage).
Knowledge of scripting languages such as Python, Perl, or TCL.
Strong understanding of STA, IR drop, EM analysis, DRC/LVS, and ECO flows. Experience with power, performance, and area (PPA) optimization.
Experience in managing and mentoring technical teams.
Excellent problem-solving skills and attention to detail. Strong communication and teamwork skills

Job Type:

Experienced Hire

Shift:

Shift 1 (Israel)

Primary Location:

Israel, Petah-Tikva

Additional Locations:

Business group:

The Silicon Engineering Group (SIG) is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs from architecture to manufacturing readiness that power Intel’s leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.