Physical IC Design Engineer

The Physical IC Design Engineer will join the Data Center Solutions Group, focusing on next-generation AI/ML ecosystems and Enterprise Storage Products. This role requires in-depth expertise in all Physical Design aspects, from RTL to silicon tape-out, including synthesis, physical verification, timing closure, EM/IR analysis, place and route, clock tree synthesis, and floor-planning. Candidates should have 12+ years of experience and a Bachelor's degree in Electrical or Electronics Engineering.

Must Have

• Execute Physical Design, Synthesis, Physical Verification, and Timing Closure
• Setup and Synthesize RTL
• Achieve timing closure through various methods and strategies
• Perform EM/IR Analysis
• Conduct Place and Route
• Implement Clock Tree Synthesis, including custom clock trees
• Perform Floor-planning and Layout, especially top-level
• Develop Flow and Methodology
• Collaborate with IC Design RTL Engineers
• Proficiency in TCL/PERL Scripting
• Proficiency in related EDA Tools
• Full physical design cycle experience: RTL to Tape-out
• Excellent verbal and written communication skills
• Bachelor’s degree in Electrical or Electronics Engineering
• 12+ Years of relevant experience
• Must work in person at the San Jose site

Perks & Benefits

• Medical, dental and vision plans
• 401(K) participation including company matching
• Employee Stock Purchase Program (ESPP)
• Employee Assistance Program (EAP)
• Company paid holidays
• Paid sick leave and vacation time
• Paid Family Leave and other leaves of absence

The Data Center Solutions Group is searching for a Physical IC Design Engineer. This position involves working with the latest technology to continue driving next generation AI/ML ecosystems through our PCIe Switch Products – and managing mega datacenters, while leading world class performance, through our Enterprise Storage Products. More specifically, this position will require in-depth knowledge and expertise in all Physical Design aspects of taking RTL to silicon tape-out.

Responsibilities include, but are not limited to the following:

• Execution of Physical Design, Synthesis, Physical Verification, and Timing Closure
• Setup and Synthesizing RTL
• Timing closure through various methods and strategies; preferable in-depth experience in top-level STA
• EM/IR Analysis,
• Place and Route
• Clock Tree Synthesis; experience with custom clock trees, insertion reduction and skew balancing techniques
• Floor-planning and Layout; preferable in-depth experience in top-level floorplanning
• Flow and Methodology Development
• Collaborating with IC Design RTL Engineers
• Must work in person at the site: no remote work allowed.

Required attributes:

• TCL/PERL Scripting
• Proficiency in related EDA Tools
• Full physical design cycle experience: RTL to Tape-out
• Excellent verbal and written communication skills

Education and Experience Requirements:

• Minimum: Bachelor’s degree required in Electrical Engineering or Electronics Engineering
• 12+ Years of relevant experience

Compensation and Benefits

The annual base salary range for this position is $141,300 - $226,000.

This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.

The company offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

The company is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Welcome! Thank you for your interest!

We are a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.