Power UPF Methodology Engineer
- A minimum of a bachelor's degree in relevant field and a minimum of 10 years of relevant industry experience
- We are looking for applicants with experience in ASIC design methodology and an emphasis on power definition.
- Experience in ASIC design flows and custom IP design flows.
- Familiar with Caliber based ERC flows.
- Familiar with power intent definition, implementation and verification flows.
- Knowledge of scripting languages like, Tcl, Perl and Python.
- Familiar with of power analysis and optimization methods.
- Familiar with entire RTL2GDS flow (RTL sim (VCS), equivalence, synthesis, P&R, intent checking)
- Strong communication skills are a pre-requisite as you will collaborate with a lot of different groups.
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