Principal Design Engineer - Analog Design

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Description

The Principal Analog IC Designer is responsible for the design and development of analog/mixed signal IC circuit blocks from initial concept/specification through final verification of conformance to customer specifications. The Principal Analog IC Designer contributes to the design of long-reach SerDes.

• Candidate’s background should include a minimum of 5 years of experience in the development of CMOS SerDes or high-speed I/O IC
• Must have a thorough understanding of jitter and signal equalization techniques
• Proficient design experience in most of the following SerDes circuit blocks:  Driver; Receiver; Serializer; Deserializer; Phase Interpolator; Low jitter PLL; High Speed Clock Distribution; ADC and DAC; Bias and Bandgap; and Voltage Regulators
• Excellent problem-solving skills, good communication skills, and ability to work cooperatively in a team environment
• Working knowledge of a set of common SerDes standards and their electrical requirements is a plus
• Position requires proficiency in using CAD tools for circuit simulation, and post-layout verification. Proficiency with layout entry a plus
• Cadence tool experience, lab test experience, and design experience at ≥16Gbps and in ≤16nm technologies are a plus
• MS or PhD in EE

We’re doing work that matters. Help us solve what others can’t.

We welcome applications from candidates with disabilities and in equity seeking groups. If you have accessibility needs during the application and interview process, we encourage you to make your needs known.