R&D Design Engineer

undefined ago • 4 Years + • Research Development • $108,000 PA - $172,800 PA

Job Summary

Job Description

This R&D Design Engineering position focuses on the design and physical implementation of high-performance System-On-Chip ASICs. Key responsibilities include working with large-scale ASICs (Multi-100 million gates complexity) and utilizing leading-edge physical design EDA tools for integrated circuits in advanced 5nm or smaller process nodes, targeting AI, computing, and networking products. The role requires strong technical hands-on competency and familiarity with VLSI design tools, Verilog simulation, DRC/LVS verification, timing analysis, and scripting languages like Tcl, Perl, and Python. Proficiency in UNIX/Linux is also essential. Candidates should possess a relevant engineering degree with significant experience.
Must have:
  • Working experience in (digital) physical design implementation of large scale ASICs (Multi-100 million gates complexity).
  • Demonstrated strong technical hands-on competency in using leading edge physical design EDA tools in projects.
  • Utilize commercial and in-house EDA tools for the design and implementation of Multi-100 million gate integrated circuits in 5nm or smaller advanced process nodes.
  • Bachelors in Electrical/Electronics engineering with at least 8 years or more experience in a relevant field or Masters in Electrical/Electronics engineering with at least 6 years or more experience in a relevant field or PhD in Electrical/Electronics engineering with at least 4 years or more experience in a relevant field.
  • Familiarity with VLSI design tools for Place&Route, Verilog simulation, DRC/LVS verification, Timing analysis (STA), Scripting languages – Tcl/ Perl/ Python.
  • Proficiency in UNIX/Linux.
Good to have:
  • Demonstrated ability in providing technical support to customers and managing customer working relationships.
  • In-depth CPU/DSP architecture/algorithm working knowledge and related physical design implementation knowledge is highly advantageous.
  • Opportunity to participate in innovation, design flow and methodology development to address challenges of designing in deep sub-micron processes and state-of-the-art ASIC design for AI, computing and networking products.
Perks:
  • Medical plans
  • dental plans
  • vision plans
  • 401(K) participation including company matching
  • Employee Stock Purchase Program (ESPP)
  • Employee Assistance Program (EAP)
  • company paid holidays
  • paid sick leave
  • vacation time
  • Paid Family Leave and other leaves of absence

Job Details

Job Description:

R&D Design Engineering position available in design and physical implementation of high performance System-On-Chip ASICs. Key competencies required are:

  • Working experience in (digital) physical design implementation of large scale ASICs (Multi-100 million gates complexity).
  • Demonstrated ability in providing technical support to customers and managing customer working relationships
  • Demonstrated strong technical hands-on competency in using leading edge physical design EDA tools in projects.
  • In-depth CPU/DSP architecture/algorithm working knowledge and related physical design implementation knowledge is highly advantageous.
  • Utilize commercial and in-house EDA tools for the design and implementation of Multi-100 million gate integrated circuits in 5nm or smaller advanced process nodes.
  • Opportunity to participate in innovation, design flow and methodology development to address challenges of designing in deep sub-micron processes and state-of-the-art ASIC design for AI, computing and networking products

Requirements

  • Bachelors in Electrical/Electronics engineering with at least 8 years or more experience in a relevant field or Masters in Electrical/Electronics engineering with at least 6 years or more experience in a relevant field or PhD in Electrical/Electronics engineering with at least 4 years or more experience in a relevant field
  • Familiarity with VLSI design tools for Place&Route, Verilog simulation, DRC/LVS verification, Timing analysis (STA), Scripting languages – Tcl/ Perl/ Python
  • Proficiency in UNIX/Linux

Additional Job Description:

Compensation and Benefits

The annual base salary range for this position is $108,000 - $172,800.

This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

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About The Company

A global infrastructure technology leader built on more than 60 years of innovation, collaboration and engineering excellence.

 

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