Senior FPGA Design and Verification Engineer
Job Summary
Job Description
JMA is seeking a Senior FPGA Design and Verification Engineer to play a key role in the design, implementation, and optimization of FPGA-based solutions for their 5G projects. The engineer will contribute to innovative product development, collaborate with cross-functional teams (HW design, QA, Operations), and lead FPGA design efforts from conception to delivery. Responsibilities include architecting and designing FPGA systems, implementing and optimizing designs for performance, power, and area efficiency, developing and executing test plans, debugging designs, and generating comprehensive documentation. The role also involves providing mentorship to junior engineers, staying abreast of industry trends, and contributing to project planning and timelines.
Must have:
- Minimum 6 years of FPGA design experience
- Expertise in Verilog/SystemVerilog or VHDL
- Proficient with FPGA design/verification tools
- Knowledge of synthesis, place-n-route, and timing closure
- Familiar with common FPGA interfaces
- Ability to write FPGA testbenches
- Lab troubleshooting skills
- Proficiency with C programming
Good to have:
- Experience in 5G Wireless systems/ORAN Fronthaul
- Linux proficiency
- Tcl, Makefile, Bitbucket, Jira knowledge
- Jenkins and Groovy familiarity
- Knowledge of FPGA security
12 skills required
Job Details
JMA makes 5G possible for organizations with the most critical connectivity demands in the world. From its global tech centers, JMA is ushering in a new era of connectivity for leading mobile carriers, the most iconic stadiums, major universities, leading healthcare facilities, and the busiest transit centers.
5G is more than another G on your phone — it is a generational opportunity to change the way the world operates. Join the industry’s fastest growing technology company to shape that future today.
The Senior FPGA Engineer will play a key role in the design, implementation, and optimization of FPGA-based solutions for JMA projects. Contribute to the development of innovative products, collaborate with cross-functional teams, including HW design, QA, and Operations, and lead FPGA design efforts from conception to delivery. This position will work onsite at the JMA office in Castel San Pietro Terme (BO).
- FPGA Design and Development:
- Architect and design FPGA-based systems to meet project requirements.
- Implement and optimize FPGA designs for performance, power, and area efficiency.
- Collaborate with hardware and software teams to integrate FPGA solutions into larger systems.
- Verification and Testing:
- Develop and execute comprehensive test plans to ensure the reliability and functionality of FPGA designs.
- Debug and troubleshoot FPGA designs, identifying and resolving issues in a timely manner.
- Documentation:
- Generate clear and comprehensive documentation for FPGA designs, including specifications, test plans, and user guides.
- Maintain version-controlled design documentation throughout the development lifecycle.
- Team Leadership:
- Provide mentorship and guidance to junior FPGA engineers.
- Collaborate with cross-functional teams to ensure seamless integration of FPGA solutions.
- Research and Innovation:
- Stay abreast of industry trends and emerging technologies in FPGA design.
- Explore and recommend new tools, methodologies, and techniques to enhance FPGA development processes.
- Project Management:
- Work closely with project managers to define project milestones, deliverables, and timelines.
- Contribute to project planning and resource allocation for FPGA development activities.
- Experience:
- Minimum of 6 years of hands-on experience in FPGA design and development.
- Experience in the FPGA based 5G Wireless systems and/or ORAN Fronthaul technology will represent a plus.
- Proven track record of successfully delivering complex FPGA projects from concept to production.
- Technical Skills:
- Strong understanding of high-speed digital design and signal integrity principles.
- Expertise of RTL optimized design technique in digital and DSP domain with Verilog/SystemVerilog and/or VHDL.
- Proficient in using FPGA design-verification tools from vendors such as Xilinx/AMD or Altera/Intel, simulator Questasim.
- Knowledge of FPGA’s synthesis, place-n-route process, and optimization for timing closure techniques.
- Familiar with FPGA interfaces – 10/25/100GbEth, ADC/DAC, uART, SPI, I2C, DDR4, JESD204B, PCIe.
- Ability to write module-level and/or top-level FPGA testbench with testcases to ensure the design coverage in simulation.
- Lab troubleshooting skills - mastering the lab set up, equipment and leveraging FPGA’s chipscope (or signaltap) debug tool.
- Knowledge of at least one between bash and Python scripting language.
- Proficiency with C programming language.
- Skills that are not mandatory but that will be considered a plus
- Proficiency with Linux systems, both as development environments and as FGPA embedded OS. This is a very strong plus.
- Other languages considered a plus are tcl, Makefile.
- Familiarity with bitbucket, Jira-based workflow is a plus.
- Familiarity with Jenkins framework and groovy language is a plus.
- Knowledge of FPGA security embedded systems, including ORAN Fronthaul’s vulnerability security WG11, secure boot, and MACsec.
#LI-AC1
At JMA, we don’t just accept differences — we embrace them. JMA is proud to be an equal opportunity workplace. We do not discriminate based upon race, religion, color, national origin, gender (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristic.
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