Senior Principal Analog Mixed Signal IC Design Engineer

Marvell's Optical PHY team develops advanced ultra high speed broadband transceivers, including equalization circuitries, data converters, and high-performance clock generation. This role involves designing sophisticated CMOS transceiver/SERDES products, spanning architectural investigations and implementation for circuits like PLL, DLL, ADC, regulators, amplifiers, TX, RX, CDRs. Responsibilities include design verification using industry standard tools, layout activities, and lab characterization and debugging.

Must Have

• Master’s or PhD in Electrical Engineering or related fields with 15+ years of experience
• Design highly sophisticated CMOS transceiver/SERDES products
• Perform architectural investigations and circuit implementation (PLL, DLL, ADC, regulators, amplifiers, TX, RX, CDRs)
• Conduct design verification using SPICE, Spectre, MATLAB
• Carry out layout activities in nanometric technologies and supervise physical design
• Work in the lab to characterize, debug, and validate designs
• Generate design related documents and application specifications
• Interface with digital and SOC teams for design integration and cross-functional verifications

Perks & Benefits

• Total compensation package with a base, bonus and equity
• Health and financial wellbeing
• Flexible time off
• 401k
• Year-end shutdown
• Floating holidays
• Paid time off to volunteer

Your Team, Your Impact

Marvell's Optical PHY team develops advanced ultra high speed broadband transceivers. These advanced transceivers consist of broadband equalization circuitries (CTLE, FFE and DFE), ultra high speed data converters (ADCs and DACs) and high performance (very high frequency and very low jitter) clock generation and clock distribution.

Our innovative approaches have resulted in the company’s products being first to market in many of key areas, including opto-electronics and DSP based transceivers providing most advanced chips and subsystems solutions to address todays and future multi-100Gig interconnect requirements for the ever-increasing demand of higher data rates.

We are seeking talented individuals to work on solving technical challenges with the most outstanding group of collaborators in the industry. Join our team of experts and make a difference in an exciting career opportunity.

What You Can Expect

Seeking a Mixed Signal designer to be part of a key team designing highly sophisticated CMOS transceiver/SERDES products.

Responsibilities would span architectural investigations and implementation for circuits such as PLL, DLL, ADC, regulators, amplifiers, TX, RX, CDRs etc. to meet key performance targets and performing design verification using industry standard tools such as SPICE, Spectre, MATLAB etc.

Should be comfortable carrying out layout activities in nanometric technologies and be able to supervise physical design. .

Should be able to work in the lab independently or with test engineers to characterize, debug and validate designs.

Would be required to generate design related documents, application specifications etc. and may support customers and FAEs as needed.

May be required to interface with digital and SOC teams to facilitate design integration and cross-functional verifications.

What We're Looking For

Master’s or PhD in Electrical Engineering or related fields with 15+ years of experience.

• Strong knowledge on the deep sub-micron CMOS technologies.
• Hands-on experience in designing mixed signal circuits including ADCs, DACs, RX, TX, PLLs, Filters, Bandgap bias circuits, regulators, and other analog circuits.
• Knowledge and Experience on low power and high speed design techniques.
• Excellent problem solving and analytical skills are essential.
• Strong knowledge on IC design CAD tools such as Spectre, Spice, Matlab, Hsim, Verilog, etc.
• Lab testing skills to evaluate the prototype unit to the design specification.

Expected Base Pay Range (USD)

192,600 - 285,050, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

Interview Integrity

As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.

Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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