Silicon Microarchitecture & Logic Design - Intern
rivos
Job Description
Positions are open for full-time and internship in the areas of CPU and SOC microarchitecture and logic design.
We are looking for all levels of talent, from entrance to advanced level of experience.
Responsibilities
- Microarchitecture development and specification - from early high-level architectural exploration through micro architectural research and arriving at a detailed specification
- Development, assessment, and refinement of RTL design to target power, performance, area, and timing goals
- Validation - support test bench development and simulation for functional and performance verification
- Performance exploration and correlation - explore high performance strategies and validate that the RTL design meets targeted performance
- Design delivery - work with multi-functional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability and power
Requirements
- Thorough knowledge of microprocessor or system architecture in one or more of the following areas:
- CPU: Instruction fetch and decode, branch prediction, instruction scheduling and register renaming, out-of-order execution, integer and floating point execution, load/store execution, cache and memory subsystems
- SOC: Fabric and network-on-chip solutions, high performance system-memory solutions, controllers for high speed I/O like PCI Express, low speed I/O like i2c, Power-management and power delivery
- Knowledge of SystemVerilog
- Experience with simulators and waveform debugging tools
- Knowledge of logic design principles along with timing and power implications
- Understanding of low power microarchitecture techniques
- Understanding of high performance techniques and trade-offs in a CPU microarchitecture
- Experience in C or C++ programming
- Experience using an interpretive language such as Perl or Python
5 Skills Required For This Role
Problem Solving
Cpp
Quality Control
Python
Perl
rivos
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