SoC Physical Design Engineer, STA/Timing

The SoC Physical Design Engineer will collaborate with design teams to understand and debug constraints, facilitating logic changes for timing improvement. This role involves close collaboration with the Physical Design team, highlighting issues and implementing best practices. Responsibilities include creating timing ECOs for project tapeout, developing and maintaining scripts and methodologies for analysis, creating documentation, and conducting in-depth analysis of timing paths to identify key issues, as well as implementing timing infrastructure. This role requires a strong understanding of physical design principles and timing analysis.