Job Description
Work on the SOC Front-end design team, taking responsibility for SOC subsystem design. This includes subsystem integration, RTL coding, design rule checks, and constraint delivery. The role requires strong Verilog and C coding skills. Knowledge of on-chip bus protocols like AMBA or AXI is a plus, as is extensive experience in front-end implementation tasks such as constraint definition, synthesis, power analysis, equivalence checking, and static timing analysis (STA). Good English communication skills are also necessary. More information about NXP in Greater China is available.
Good To Have:
- Knowledge of on-chip bus protocols: AMBA, AXI or similar
- Experience in constraint definition (timing & power)
- Experience in synthesis
- Experience in power analysis
- Experience in equivalence checking
- Experience in STA
Must Have:
- Strong Verilog and C coding skills
- Good English communication skills
Responsibilities：
- Work on SOC Front-end design team, be responsible for the SOC subsystem design, including subsystem integration, RTL coding, design rule check and constrain delivery.
Requirements:
- Strong Verilog and C coding skills
- Knowledge of on-chip bus protocols: AMBA, AXI or similar is a plus
- Extensive knowledge and experience in front-end implementation tasks such as constraint definition (timing & power), synthesis, power analysis, equivalence checking and STA is a plus
- Good English communication skills.
Set alerts for new jobs by NXP
Set alerts for new jobs in China
