Design Quality and Reliability Engineer

10 Months ago • 3 Years +
Research Development

Job Description

This Design Quality and Reliability Engineer role involves pre-silicon verification and simulation for CPU and Hard IPs on advanced Intel processes. Responsibilities include collaborating with design teams, conducting quality audits and risk assessments, analyzing physical design performance and reliability verification results, and mitigating circuit marginalities (Device Aging, Electromigration, ESD, Latch-Up, SER). The role also encompasses pre-silicon design modeling, developing design methods and tools, program management, and guiding junior team members. Assessing design process risks and driving resolutions with architecture and manufacturing teams is crucial.
Good To Have:
  • VLSI design flow, technology development, device physics
  • Experience in device aging, Interconnect Reliability, ESD-LU
  • Programming (Python, Perl, VB)
  • Master's or PhD in relevant field
Must Have:
  • Pre-silicon verification and simulation
  • Circuit simulation, PV, RV, Physical Design
  • Device physics and circuit operations
  • Analog/digital circuit design methodologies
  • Risk assessment and mitigation
  • Collaboration with design teams

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Job Description

  • In this position you will work in a group of pre-Silicon design Quality and Reliability Engineers (QRE), supporting development of CPU and Hard IPs on the most advanced Intel processes. 
  • You will be responsible for pre-Silicon verification and execution of simulations in the design phase as well as developing new design methods, flows and tools for VLSI circuit IP and SoC projects.
  • Primary responsibilities are to collaborate with Hard IP and SoC design teams, perform quality audits in the design phase, risk assessments on pre-silicon design reliability and analysis of physical design performance verification (PV) as well as reliability verification (RV) results.
  • Key tasks include pre-silicon design modelling and correct-by-construction design simulation verifications to mitigate circuit marginalities in Device Aging, Interconnect Reliability (Electromigration), Electro Static Discharge (ESD), Latch-Up (LU), Soft Error Reliability (SER) as well as design/package interactions. 
  • Other tasks include program management and technical guidance to junior team members. 
  • An important aspect of this role is to assess risks associated with design process marginalities and drive resolutions with partners from design architecture and manufacturing teams. 

Qualifications

  • Bachelors / Masters / PhD in Electronics Engineering, Physics or Material Science with 3+ years of relevant experience in circuit simulation, PV, RV and Physical Design.
  • Strong skills in device physics and circuit operations along with technical problem solving, communication and data analysis.
  • Knowledge in analog and digital circuit design methodologies (timing, noise, physical design, circuit design, mask design and layout).
  • Understanding of optimizations and trade-offs to achieve better performance, power, reliability.
  • Experiences in overall VLSI design flow, technology development and device physics are a plus.
  • Design knowledge in the areas of device aging, Interconnect Reliability and ESD-LU is a plus.
  • Experience in programming using scripting languages such as Python Perl or VB is a plus.
  • Excellent communication and presentation skills.
  • Good written and spoken English.
  • Ability to effectively work in a team environment.
  • Well organized, with the ability to effectively manage multiple tasks 

Inside this Business Group

The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.

Other Locations

IN, Bangalore

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel’s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at https://jobs.intel.com/ and not fall prey to unscrupulous elements.

Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change...

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